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Merge changes from topic "unify-qemu-machines" into integration

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* changes:
  refactor(qemu): handle SPM_MM builds
  refactor(qemu): handle AArch64 flags
  refactor(qemu): common cpu features enablement
  refactor(qemu): common BL31 sources
  refactor(qemu): common BL1/2 sources
  refactor(qemu): move CPU definitions into one place
  refactor(qemu): move FDT stuff into one place
This commit is contained in:
Sandrine Bailleux 2023-08-22 15:26:23 +02:00 • committed by TrustedFirmware Code Review
commit 4993e8f5ff
3 changed files with 127 additions and 189 deletions
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107
plat/qemu/common/common.mk Normal file
View file

@ -0,0 +1,107 @@
#
# Copyright (c) 2023, Linaro Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
include lib/libfdt/libfdt.mk
include common/fdt_wrappers.mk
PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
-I${PLAT_QEMU_COMMON_PATH}/include \
-I${PLAT_QEMU_PATH}/include \
-Iinclude/common/tbbr
ifeq (${ARCH},aarch32)
QEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S
else
QEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \
lib/cpus/aarch64/cortex_a72.S \
lib/cpus/aarch64/cortex_a76.S \
lib/cpus/aarch64/neoverse_n_common.S \
lib/cpus/aarch64/neoverse_n1.S \
lib/cpus/aarch64/neoverse_v1.S \
lib/cpus/aarch64/qemu_max.S
PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
endif
PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \
${PLAT_QEMU_COMMON_PATH}/qemu_console.c \
drivers/arm/pl011/${ARCH}/pl011_console.S
include lib/xlat_tables_v2/xlat_tables.mk
PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
ifneq ($(ENABLE_STACK_PROTECTOR), 0)
PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
endif
BL1_SOURCES += drivers/io/io_semihosting.c \
drivers/io/io_storage.c \
drivers/io/io_fip.c \
drivers/io/io_memmap.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c \
${QEMU_CPU_LIBS}
BL2_SOURCES += drivers/io/io_semihosting.c \
drivers/io/io_storage.c \
drivers/io/io_fip.c \
drivers/io/io_memmap.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \
${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \
${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \
common/desc_image_load.c \
common/fdt_fixup.c
BL31_SOURCES += ${QEMU_CPU_LIBS} \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
plat/common/plat_psci_common.c \
${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \
${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
common/fdt_fixup.c \
${QEMU_GIC_SOURCES}
# CPU flag enablement
ifeq (${ARCH},aarch64)
# Later QEMU versions support SME and SVE.
# SPM_MM is not compatible with ENABLE_SVE_FOR_NS (build breaks)
ifeq (${SPM_MM},1)
ENABLE_SVE_FOR_NS := 0
ENABLE_SME_FOR_NS := 0
else
ENABLE_SVE_FOR_NS := 2
ENABLE_SME_FOR_NS := 2
endif
endif
# QEMU will use the RNDR instruction for the stack protector canary.
ENABLE_FEAT_RNG := 2
# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max
ENABLE_FEAT_FGT := 2
ifeq (${ARCH},aarch64)
# Treating this as a memory-constrained port for now
USE_COHERENT_MEM := 0
# This can be overridden depending on CPU(s) used in the QEMU image
HW_ASSISTED_COHERENCY := 1
CTX_INCLUDE_AARCH32_REGS := 0
ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
endif
endif

110
plat/qemu/qemu/platform.mk
View file

@ -4,6 +4,11 @@
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
PLAT_QEMU_PATH := plat/qemu/qemu
PLAT_QEMU_COMMON_PATH := plat/qemu/common
include plat/qemu/common/common.mk
# Use the GICv2 driver on QEMU by default # Use the GICv2 driver on QEMU by default
QEMU_USE_GIC_DRIVER := QEMU_GICV2 QEMU_USE_GIC_DRIVER := QEMU_GICV2
@ -18,17 +23,6 @@ $(eval $(call add_define,ARMV7_SUPPORTS_GENERIC_TIMER))
$(eval $(call add_define,ARMV7_SUPPORTS_VFP)) $(eval $(call add_define,ARMV7_SUPPORTS_VFP))
# Qemu expects a BL32 boot stage. # Qemu expects a BL32 boot stage.
NEED_BL32 := yes NEED_BL32 := yes
else
CTX_INCLUDE_AARCH32_REGS := 0
ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
endif
# Treating this as a memory-constrained port for now
USE_COHERENT_MEM := 0
# This can be overridden depending on CPU(s) used in the QEMU image
HW_ASSISTED_COHERENCY := 1
endif # ARMv7 endif # ARMv7
ifeq (${SPD},opteed) ifeq (${SPD},opteed)
@ -42,42 +36,10 @@ $(eval $(call add_define,SPMC_OPTEE))
add-lib-optee := yes add-lib-optee := yes
endif endif
include lib/libfdt/libfdt.mk
ifeq ($(NEED_BL32),yes) ifeq ($(NEED_BL32),yes)
$(eval $(call add_define,QEMU_LOAD_BL32)) $(eval $(call add_define,QEMU_LOAD_BL32))
endif endif
PLAT_QEMU_PATH := plat/qemu/qemu
PLAT_QEMU_COMMON_PATH := plat/qemu/common
PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
-I${PLAT_QEMU_COMMON_PATH}/include \
-I${PLAT_QEMU_PATH}/include \
-Iinclude/common/tbbr
ifeq (${ARM_ARCH_MAJOR},8)
PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
QEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \
lib/cpus/aarch64/cortex_a72.S \
lib/cpus/aarch64/cortex_a76.S \
lib/cpus/aarch64/neoverse_n_common.S \
lib/cpus/aarch64/neoverse_n1.S \
lib/cpus/aarch64/neoverse_v1.S \
lib/cpus/aarch64/qemu_max.S
else
QEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S
endif
PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \
${PLAT_QEMU_COMMON_PATH}/qemu_console.c \
drivers/arm/pl011/${ARCH}/pl011_console.S
include lib/xlat_tables_v2/xlat_tables.mk
PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
ifneq (${TRUSTED_BOARD_BOOT},0) ifneq (${TRUSTED_BOARD_BOOT},0)
AUTH_SOURCES := drivers/auth/auth_mod.c \ AUTH_SOURCES := drivers/auth/auth_mod.c \
@ -150,42 +112,7 @@ ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT}),)
include drivers/auth/mbedtls/mbedtls_crypto.mk include drivers/auth/mbedtls/mbedtls_crypto.mk
endif endif
BL1_SOURCES += drivers/io/io_semihosting.c \ BL2_SOURCES += ${FDT_WRAPPERS_SOURCES} \
drivers/io/io_storage.c \
drivers/io/io_fip.c \
drivers/io/io_memmap.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c \
${QEMU_CPU_LIBS}
ifeq (${ARM_ARCH_MAJOR},8)
BL1_SOURCES += lib/cpus/${ARCH}/aem_generic.S \
lib/cpus/${ARCH}/cortex_a53.S \
lib/cpus/${ARCH}/cortex_a57.S \
lib/cpus/${ARCH}/cortex_a72.S \
lib/cpus/${ARCH}/qemu_max.S \
else
BL1_SOURCES += lib/cpus/${ARCH}/cortex_a15.S
endif
BL2_SOURCES += drivers/io/io_semihosting.c \
drivers/io/io_storage.c \
drivers/io/io_fip.c \
drivers/io/io_memmap.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \
${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \
${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \
common/fdt_fixup.c \
common/fdt_wrappers.c \
common/desc_image_load.c \
common/uuid.c common/uuid.c
ifeq ($(add-lib-optee),yes) ifeq ($(add-lib-optee),yes)
@ -218,18 +145,11 @@ else
$(error "Incorrect GIC driver chosen for QEMU platform") $(error "Incorrect GIC driver chosen for QEMU platform")
endif endif
ifeq (${ARM_ARCH_MAJOR},8) ifeq (${ARCH},aarch64)
BL31_SOURCES += ${QEMU_CPU_LIBS} \ BL31_SOURCES += drivers/arm/pl061/pl061_gpio.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
plat/common/plat_psci_common.c \
drivers/arm/pl061/pl061_gpio.c \
drivers/gpio/gpio.c \ drivers/gpio/gpio.c \
${PLAT_QEMU_COMMON_PATH}/qemu_pm.c \ ${PLAT_QEMU_COMMON_PATH}/qemu_pm.c \
${PLAT_QEMU_COMMON_PATH}/topology.c \ ${PLAT_QEMU_COMMON_PATH}/topology.c
${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \
${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
${QEMU_GIC_SOURCES}
ifeq (${SDEI_SUPPORT}, 1) ifeq (${SDEI_SUPPORT}, 1)
BL31_SOURCES += plat/qemu/common/qemu_sdei.c BL31_SOURCES += plat/qemu/common/qemu_sdei.c
@ -282,9 +202,6 @@ endif
SEPARATE_CODE_AND_RODATA := 1 SEPARATE_CODE_AND_RODATA := 1
ENABLE_STACK_PROTECTOR := 0 ENABLE_STACK_PROTECTOR := 0
ifneq ($(ENABLE_STACK_PROTECTOR), 0)
PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
endif
BL32_RAM_LOCATION := tdram BL32_RAM_LOCATION := tdram
ifeq (${BL32_RAM_LOCATION}, tsram) ifeq (${BL32_RAM_LOCATION}, tsram)
@ -306,15 +223,6 @@ $(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
$(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
# QEMU will use the RNDR instruction for the stack protector canary.
ENABLE_FEAT_RNG := 2
# Later QEMU versions support SME and SVE.
ifneq (${ARCH},aarch32)
ENABLE_SVE_FOR_NS := 2
ENABLE_SME_FOR_NS := 2
endif
qemu_fw.bios: bl1 fip qemu_fw.bios: bl1 fip
$(ECHO) " DD $@" $(ECHO) " DD $@"
$(Q)cp ${BUILD_PLAT}/bl1.bin ${BUILD_PLAT}/$@ $(Q)cp ${BUILD_PLAT}/bl1.bin ${BUILD_PLAT}/$@

97
plat/qemu/qemu_sbsa/platform.mk
View file

@ -4,11 +4,8 @@
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
include common/fdt_wrappers.mk PLAT_QEMU_PATH := plat/qemu/qemu_sbsa
PLAT_QEMU_COMMON_PATH := plat/qemu/common
CRASH_REPORTING := 1
include lib/libfdt/libfdt.mk
ifeq (${SPM_MM},1) ifeq (${SPM_MM},1)
NEED_BL32 := yes NEED_BL32 := yes
@ -16,75 +13,19 @@ EL3_EXCEPTION_HANDLING := 1
GICV2_G0_FOR_EL3 := 1 GICV2_G0_FOR_EL3 := 1
endif endif
include plat/qemu/common/common.mk
CRASH_REPORTING := 1
# Enable new version of image loading on QEMU platforms # Enable new version of image loading on QEMU platforms
LOAD_IMAGE_V2 := 1 LOAD_IMAGE_V2 := 1
CTX_INCLUDE_AARCH32_REGS := 0
ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
endif
ifeq ($(NEED_BL32),yes) ifeq ($(NEED_BL32),yes)
$(eval $(call add_define,QEMU_LOAD_BL32)) $(eval $(call add_define,QEMU_LOAD_BL32))
endif endif
PLAT_QEMU_PATH := plat/qemu/qemu_sbsa BL2_SOURCES += $(LIBFDT_SRCS)
PLAT_QEMU_COMMON_PATH := plat/qemu/common
PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
-I${PLAT_QEMU_COMMON_PATH}/include \
-I${PLAT_QEMU_PATH}/include \
-Iinclude/common/tbbr
PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \
${PLAT_QEMU_COMMON_PATH}/qemu_console.c \
drivers/arm/pl011/${ARCH}/pl011_console.S
# Treating this as a memory-constrained port for now
USE_COHERENT_MEM := 0
# This can be overridden depending on CPU(s) used in the QEMU image
HW_ASSISTED_COHERENCY := 1
QEMU_CPU_LIBS := lib/cpus/aarch64/cortex_a57.S \
lib/cpus/aarch64/cortex_a72.S \
lib/cpus/aarch64/neoverse_n_common.S \
lib/cpus/aarch64/neoverse_n1.S \
lib/cpus/aarch64/neoverse_v1.S \
lib/cpus/aarch64/qemu_max.S
include lib/xlat_tables_v2/xlat_tables.mk
PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
BL1_SOURCES += drivers/io/io_semihosting.c \
drivers/io/io_storage.c \
drivers/io/io_fip.c \
drivers/io/io_memmap.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c
BL1_SOURCES += ${QEMU_CPU_LIBS}
BL2_SOURCES += drivers/io/io_semihosting.c \
drivers/io/io_storage.c \
drivers/io/io_fip.c \
drivers/io/io_memmap.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \
common/fdt_fixup.c \
$(LIBFDT_SRCS)
ifeq (${LOAD_IMAGE_V2},1)
BL2_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \
${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \
common/desc_image_load.c
endif
# Include GICv3 driver files # Include GICv3 driver files
include drivers/arm/gic/v3/gicv3.mk include drivers/arm/gic/v3/gicv3.mk
@ -92,18 +33,10 @@ include drivers/arm/gic/v3/gicv3.mk
QEMU_GIC_SOURCES := ${GICV3_SOURCES} \ QEMU_GIC_SOURCES := ${GICV3_SOURCES} \
plat/common/plat_gicv3.c plat/common/plat_gicv3.c
BL31_SOURCES += ${QEMU_CPU_LIBS} \ BL31_SOURCES += ${PLAT_QEMU_PATH}/sbsa_gic.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
plat/common/plat_psci_common.c \
${PLAT_QEMU_PATH}/sbsa_gic.c \
${PLAT_QEMU_PATH}/sbsa_pm.c \ ${PLAT_QEMU_PATH}/sbsa_pm.c \
${PLAT_QEMU_PATH}/sbsa_sip_svc.c \ ${PLAT_QEMU_PATH}/sbsa_sip_svc.c \
${PLAT_QEMU_PATH}/sbsa_topology.c \ ${PLAT_QEMU_PATH}/sbsa_topology.c
${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \
${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
common/fdt_fixup.c \
${QEMU_GIC_SOURCES}
BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
@ -113,9 +46,6 @@ endif
SEPARATE_CODE_AND_RODATA := 1 SEPARATE_CODE_AND_RODATA := 1
ENABLE_STACK_PROTECTOR := 0 ENABLE_STACK_PROTECTOR := 0
ifneq ($(ENABLE_STACK_PROTECTOR), 0)
PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
endif
MULTI_CONSOLE_API := 1 MULTI_CONSOLE_API := 1
@ -137,10 +67,3 @@ $(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
$(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
# Later QEMU versions support SME and SVE.
ENABLE_SVE_FOR_NS := 2
ENABLE_SME_FOR_NS := 2
# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max
ENABLE_FEAT_FGT := 2