mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-17 01:54:22 +00:00
Merge changes from topic "unify-qemu-machines" into integration
* changes: refactor(qemu): handle SPM_MM builds refactor(qemu): handle AArch64 flags refactor(qemu): common cpu features enablement refactor(qemu): common BL31 sources refactor(qemu): common BL1/2 sources refactor(qemu): move CPU definitions into one place refactor(qemu): move FDT stuff into one place
This commit is contained in:
Sandrine Bailleux
TrustedFirmware Code Review
commit
4993e8f5ff
3 changed files with 127 additions and 189 deletions
107
plat/qemu/common/common.mk
Normal file
107
plat/qemu/common/common.mk
Normal file
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@ -0,0 +1,107 @@
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#
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# Copyright (c) 2023, Linaro Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include lib/libfdt/libfdt.mk
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include common/fdt_wrappers.mk
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PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
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-I${PLAT_QEMU_COMMON_PATH}/include \
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-I${PLAT_QEMU_PATH}/include \
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-Iinclude/common/tbbr
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ifeq (${ARCH},aarch32)
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QEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S
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else
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QEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \
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lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/cpus/aarch64/cortex_a72.S \
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lib/cpus/aarch64/cortex_a76.S \
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lib/cpus/aarch64/neoverse_n_common.S \
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lib/cpus/aarch64/neoverse_n1.S \
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lib/cpus/aarch64/neoverse_v1.S \
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lib/cpus/aarch64/qemu_max.S
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PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
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endif
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PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_console.c \
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drivers/arm/pl011/${ARCH}/pl011_console.S
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include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
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ifneq ($(ENABLE_STACK_PROTECTOR), 0)
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PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
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endif
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BL1_SOURCES += drivers/io/io_semihosting.c \
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drivers/io/io_storage.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
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${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c \
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${QEMU_CPU_LIBS}
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BL2_SOURCES += drivers/io/io_semihosting.c \
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drivers/io/io_storage.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
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${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \
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common/desc_image_load.c \
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common/fdt_fixup.c
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BL31_SOURCES += ${QEMU_CPU_LIBS} \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/common/plat_psci_common.c \
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${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
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common/fdt_fixup.c \
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${QEMU_GIC_SOURCES}
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# CPU flag enablement
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ifeq (${ARCH},aarch64)
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# Later QEMU versions support SME and SVE.
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# SPM_MM is not compatible with ENABLE_SVE_FOR_NS (build breaks)
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ifeq (${SPM_MM},1)
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ENABLE_SVE_FOR_NS := 0
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ENABLE_SME_FOR_NS := 0
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else
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ENABLE_SVE_FOR_NS := 2
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ENABLE_SME_FOR_NS := 2
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endif
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endif
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# QEMU will use the RNDR instruction for the stack protector canary.
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ENABLE_FEAT_RNG := 2
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# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max
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ENABLE_FEAT_FGT := 2
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ifeq (${ARCH},aarch64)
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# Treating this as a memory-constrained port for now
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USE_COHERENT_MEM := 0
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# This can be overridden depending on CPU(s) used in the QEMU image
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HW_ASSISTED_COHERENCY := 1
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CTX_INCLUDE_AARCH32_REGS := 0
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ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
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$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
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endif
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endif
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@ -4,6 +4,11 @@
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# SPDX-License-Identifier: BSD-3-Clause
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#
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PLAT_QEMU_PATH := plat/qemu/qemu
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PLAT_QEMU_COMMON_PATH := plat/qemu/common
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include plat/qemu/common/common.mk
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# Use the GICv2 driver on QEMU by default
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QEMU_USE_GIC_DRIVER := QEMU_GICV2
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@ -18,17 +23,6 @@ $(eval $(call add_define,ARMV7_SUPPORTS_GENERIC_TIMER))
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$(eval $(call add_define,ARMV7_SUPPORTS_VFP))
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# Qemu expects a BL32 boot stage.
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NEED_BL32 := yes
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else
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CTX_INCLUDE_AARCH32_REGS := 0
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ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
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$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
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endif
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# Treating this as a memory-constrained port for now
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USE_COHERENT_MEM := 0
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# This can be overridden depending on CPU(s) used in the QEMU image
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HW_ASSISTED_COHERENCY := 1
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endif # ARMv7
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ifeq (${SPD},opteed)
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@ -42,42 +36,10 @@ $(eval $(call add_define,SPMC_OPTEE))
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add-lib-optee := yes
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endif
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include lib/libfdt/libfdt.mk
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ifeq ($(NEED_BL32),yes)
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$(eval $(call add_define,QEMU_LOAD_BL32))
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endif
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PLAT_QEMU_PATH := plat/qemu/qemu
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PLAT_QEMU_COMMON_PATH := plat/qemu/common
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PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
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-I${PLAT_QEMU_COMMON_PATH}/include \
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-I${PLAT_QEMU_PATH}/include \
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-Iinclude/common/tbbr
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ifeq (${ARM_ARCH_MAJOR},8)
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PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
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QEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \
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lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/cpus/aarch64/cortex_a72.S \
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lib/cpus/aarch64/cortex_a76.S \
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lib/cpus/aarch64/neoverse_n_common.S \
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lib/cpus/aarch64/neoverse_n1.S \
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lib/cpus/aarch64/neoverse_v1.S \
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lib/cpus/aarch64/qemu_max.S
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else
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QEMU_CPU_LIBS := lib/cpus/${ARCH}/cortex_a15.S
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endif
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PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_console.c \
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drivers/arm/pl011/${ARCH}/pl011_console.S
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include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
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ifneq (${TRUSTED_BOARD_BOOT},0)
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AUTH_SOURCES := drivers/auth/auth_mod.c \
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@ -150,42 +112,7 @@ ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT}),)
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include drivers/auth/mbedtls/mbedtls_crypto.mk
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endif
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BL1_SOURCES += drivers/io/io_semihosting.c \
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drivers/io/io_storage.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
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${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c \
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${QEMU_CPU_LIBS}
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ifeq (${ARM_ARCH_MAJOR},8)
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BL1_SOURCES += lib/cpus/${ARCH}/aem_generic.S \
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lib/cpus/${ARCH}/cortex_a53.S \
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lib/cpus/${ARCH}/cortex_a57.S \
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lib/cpus/${ARCH}/cortex_a72.S \
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lib/cpus/${ARCH}/qemu_max.S \
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else
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BL1_SOURCES += lib/cpus/${ARCH}/cortex_a15.S
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endif
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BL2_SOURCES += drivers/io/io_semihosting.c \
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drivers/io/io_storage.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
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${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \
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common/fdt_fixup.c \
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common/fdt_wrappers.c \
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common/desc_image_load.c \
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BL2_SOURCES += ${FDT_WRAPPERS_SOURCES} \
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common/uuid.c
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ifeq ($(add-lib-optee),yes)
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@ -218,18 +145,11 @@ else
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$(error "Incorrect GIC driver chosen for QEMU platform")
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endif
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ifeq (${ARM_ARCH_MAJOR},8)
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BL31_SOURCES += ${QEMU_CPU_LIBS} \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/common/plat_psci_common.c \
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drivers/arm/pl061/pl061_gpio.c \
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ifeq (${ARCH},aarch64)
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BL31_SOURCES += drivers/arm/pl061/pl061_gpio.c \
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drivers/gpio/gpio.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_pm.c \
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${PLAT_QEMU_COMMON_PATH}/topology.c \
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${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
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${QEMU_GIC_SOURCES}
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${PLAT_QEMU_COMMON_PATH}/qemu_pm.c \
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${PLAT_QEMU_COMMON_PATH}/topology.c
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ifeq (${SDEI_SUPPORT}, 1)
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BL31_SOURCES += plat/qemu/common/qemu_sdei.c
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@ -282,9 +202,6 @@ endif
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SEPARATE_CODE_AND_RODATA := 1
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ENABLE_STACK_PROTECTOR := 0
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ifneq ($(ENABLE_STACK_PROTECTOR), 0)
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PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
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endif
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BL32_RAM_LOCATION := tdram
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ifeq (${BL32_RAM_LOCATION}, tsram)
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@ -306,15 +223,6 @@ $(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
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ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
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$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
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# QEMU will use the RNDR instruction for the stack protector canary.
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ENABLE_FEAT_RNG := 2
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# Later QEMU versions support SME and SVE.
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ifneq (${ARCH},aarch32)
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ENABLE_SVE_FOR_NS := 2
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ENABLE_SME_FOR_NS := 2
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endif
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qemu_fw.bios: bl1 fip
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$(ECHO) " DD $@"
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$(Q)cp ${BUILD_PLAT}/bl1.bin ${BUILD_PLAT}/$@
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|
|
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@ -4,11 +4,8 @@
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include common/fdt_wrappers.mk
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CRASH_REPORTING := 1
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include lib/libfdt/libfdt.mk
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PLAT_QEMU_PATH := plat/qemu/qemu_sbsa
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PLAT_QEMU_COMMON_PATH := plat/qemu/common
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ifeq (${SPM_MM},1)
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NEED_BL32 := yes
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@ -16,75 +13,19 @@ EL3_EXCEPTION_HANDLING := 1
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GICV2_G0_FOR_EL3 := 1
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endif
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include plat/qemu/common/common.mk
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CRASH_REPORTING := 1
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# Enable new version of image loading on QEMU platforms
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LOAD_IMAGE_V2 := 1
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CTX_INCLUDE_AARCH32_REGS := 0
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ifeq (${CTX_INCLUDE_AARCH32_REGS}, 1)
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$(error "This is an AArch64-only port; CTX_INCLUDE_AARCH32_REGS must be disabled")
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endif
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ifeq ($(NEED_BL32),yes)
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$(eval $(call add_define,QEMU_LOAD_BL32))
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endif
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PLAT_QEMU_PATH := plat/qemu/qemu_sbsa
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PLAT_QEMU_COMMON_PATH := plat/qemu/common
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PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
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-I${PLAT_QEMU_COMMON_PATH}/include \
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-I${PLAT_QEMU_PATH}/include \
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-Iinclude/common/tbbr
|
||||
|
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PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
|
||||
|
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PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \
|
||||
${PLAT_QEMU_COMMON_PATH}/qemu_console.c \
|
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drivers/arm/pl011/${ARCH}/pl011_console.S
|
||||
|
||||
# Treating this as a memory-constrained port for now
|
||||
USE_COHERENT_MEM := 0
|
||||
|
||||
# This can be overridden depending on CPU(s) used in the QEMU image
|
||||
HW_ASSISTED_COHERENCY := 1
|
||||
|
||||
QEMU_CPU_LIBS := lib/cpus/aarch64/cortex_a57.S \
|
||||
lib/cpus/aarch64/cortex_a72.S \
|
||||
lib/cpus/aarch64/neoverse_n_common.S \
|
||||
lib/cpus/aarch64/neoverse_n1.S \
|
||||
lib/cpus/aarch64/neoverse_v1.S \
|
||||
lib/cpus/aarch64/qemu_max.S
|
||||
|
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include lib/xlat_tables_v2/xlat_tables.mk
|
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PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
|
||||
|
||||
BL1_SOURCES += drivers/io/io_semihosting.c \
|
||||
drivers/io/io_storage.c \
|
||||
drivers/io/io_fip.c \
|
||||
drivers/io/io_memmap.c \
|
||||
lib/semihosting/semihosting.c \
|
||||
lib/semihosting/${ARCH}/semihosting_call.S \
|
||||
${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
|
||||
${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
|
||||
${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c
|
||||
|
||||
BL1_SOURCES += ${QEMU_CPU_LIBS}
|
||||
|
||||
BL2_SOURCES += drivers/io/io_semihosting.c \
|
||||
drivers/io/io_storage.c \
|
||||
drivers/io/io_fip.c \
|
||||
drivers/io/io_memmap.c \
|
||||
lib/semihosting/semihosting.c \
|
||||
lib/semihosting/${ARCH}/semihosting_call.S \
|
||||
${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
|
||||
${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
|
||||
${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \
|
||||
common/fdt_fixup.c \
|
||||
$(LIBFDT_SRCS)
|
||||
ifeq (${LOAD_IMAGE_V2},1)
|
||||
BL2_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \
|
||||
${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \
|
||||
common/desc_image_load.c
|
||||
endif
|
||||
BL2_SOURCES += $(LIBFDT_SRCS)
|
||||
|
||||
# Include GICv3 driver files
|
||||
include drivers/arm/gic/v3/gicv3.mk
|
||||
|
|
@ -92,18 +33,10 @@ include drivers/arm/gic/v3/gicv3.mk
|
|||
QEMU_GIC_SOURCES := ${GICV3_SOURCES} \
|
||||
plat/common/plat_gicv3.c
|
||||
|
||||
BL31_SOURCES += ${QEMU_CPU_LIBS} \
|
||||
lib/semihosting/semihosting.c \
|
||||
lib/semihosting/${ARCH}/semihosting_call.S \
|
||||
plat/common/plat_psci_common.c \
|
||||
${PLAT_QEMU_PATH}/sbsa_gic.c \
|
||||
BL31_SOURCES += ${PLAT_QEMU_PATH}/sbsa_gic.c \
|
||||
${PLAT_QEMU_PATH}/sbsa_pm.c \
|
||||
${PLAT_QEMU_PATH}/sbsa_sip_svc.c \
|
||||
${PLAT_QEMU_PATH}/sbsa_topology.c \
|
||||
${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \
|
||||
${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
|
||||
common/fdt_fixup.c \
|
||||
${QEMU_GIC_SOURCES}
|
||||
${PLAT_QEMU_PATH}/sbsa_topology.c
|
||||
|
||||
BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
|
||||
|
||||
|
|
@ -113,9 +46,6 @@ endif
|
|||
|
||||
SEPARATE_CODE_AND_RODATA := 1
|
||||
ENABLE_STACK_PROTECTOR := 0
|
||||
ifneq ($(ENABLE_STACK_PROTECTOR), 0)
|
||||
PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
|
||||
endif
|
||||
|
||||
MULTI_CONSOLE_API := 1
|
||||
|
||||
|
|
@ -137,10 +67,3 @@ $(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
|
|||
|
||||
ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
|
||||
$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
|
||||
|
||||
# Later QEMU versions support SME and SVE.
|
||||
ENABLE_SVE_FOR_NS := 2
|
||||
ENABLE_SME_FOR_NS := 2
|
||||
|
||||
# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max
|
||||
ENABLE_FEAT_FGT := 2
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue