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plat: marvell: armada: a8k: add OP-TEE OS MMU tables

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Adjust the latest OP-TEE memory definitions to the
newest TF-A baseline.

Change-Id: Ib9c82b85f868adaf3c7285eb340486bda9c59c36
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
This commit is contained in:
Konstantin Porotchkin 2019-04-15 16:29:08 +03:00 • committed by Marcin Wojtas
parent 5a40d70f06
commit 47d1773f90
2 changed files with 34 additions and 8 deletions
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38
include/plat/marvell/armada/a8k/common/marvell_def.h
View file

@ -77,20 +77,42 @@
#define MARVELL_IRQ_SEC_SGI_6 14 #define MARVELL_IRQ_SEC_SGI_6 14
#define MARVELL_IRQ_SEC_SGI_7 15 #define MARVELL_IRQ_SEC_SGI_7 15
#if LLC_SRAM #ifdef SPD_opteed
/* The entire LLC SRAM should be marked as secure in MMU tables, /*
* otherwise any access to it will produce exception * BL2 needs to map 4MB at the end of TZC_DRAM1 in order to
* load/authenticate the trusted os extra image. The first 512KB of
* TZC_DRAM1 are reserved for trusted os (OPTEE). The extra image loading
* for OPTEE is paged image which only include the paging part using
* virtual memory but without "init" data. OPTEE will copy the "init" data
* (from pager image) to the first 512KB of TZC_DRAM, and then copy the
* extra image behind the "init" data.
*/ */
#define MARVELL_MAP_SECURE_RAM MAP_REGION_FLAT( \ #define MARVELL_OPTEE_PAGEABLE_LOAD_BASE \
PLAT_MARVELL_LLC_SRAM_BASE,\ (PLAT_MARVELL_TRUSTED_RAM_BASE + \
PLAT_MARVELL_LLC_SRAM_SIZE,\ PLAT_MARVELL_TRUSTED_RAM_SIZE - \
MARVELL_OPTEE_PAGEABLE_LOAD_SIZE)
#define MARVELL_OPTEE_PAGEABLE_LOAD_SIZE 0x400000
#define MARVELL_OPTEE_PAGEABLE_LOAD_MEM \
MAP_REGION_FLAT( \
MARVELL_OPTEE_PAGEABLE_LOAD_BASE, \
MARVELL_OPTEE_PAGEABLE_LOAD_SIZE, \
MT_MEMORY | MT_RW | MT_SECURE)
/*
* Map the memory for the OP-TEE core (also known as OP-TEE pager when paging
* support is enabled).
*/
#define MARVELL_MAP_OPTEE_CORE_MEM MAP_REGION_FLAT( \
BL32_BASE, \
BL32_LIMIT - BL32_BASE, \
MT_MEMORY | MT_RW | MT_SECURE) MT_MEMORY | MT_RW | MT_SECURE)
#else #endif /* SPD_opteed */
#define MARVELL_MAP_SECURE_RAM MAP_REGION_FLAT( \ #define MARVELL_MAP_SECURE_RAM MAP_REGION_FLAT( \
MARVELL_SHARED_RAM_BASE, \ MARVELL_SHARED_RAM_BASE, \
MARVELL_SHARED_RAM_SIZE, \ MARVELL_SHARED_RAM_SIZE, \
MT_MEMORY | MT_RW | MT_SECURE) MT_MEMORY | MT_RW | MT_SECURE)
#endif
#define MARVELL_MAP_DRAM MAP_REGION_FLAT( \ #define MARVELL_MAP_DRAM MAP_REGION_FLAT( \
MARVELL_DRAM_BASE, \ MARVELL_DRAM_BASE, \
MARVELL_DRAM_SIZE, \ MARVELL_DRAM_SIZE, \

4
plat/marvell/armada/a8k/common/aarch64/a8k_common.c
View file

@ -28,6 +28,10 @@ const mmap_region_t plat_marvell_mmap[] = {
MARVELL_MAP_SECURE_RAM, MARVELL_MAP_SECURE_RAM,
MAP_DEVICE0, MAP_DEVICE0,
MARVELL_MAP_DRAM, MARVELL_MAP_DRAM,
#ifdef SPD_opteed
MARVELL_MAP_OPTEE_CORE_MEM,
MARVELL_OPTEE_PAGEABLE_LOAD_MEM,
#endif
{0} {0}
}; };
#endif #endif