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fix(intel): revert sys counter to 400MHz

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For Simics and official release, revert back to 400MHz instead of
80MHz. Sys counter shall get from a static clock.

Change-Id: I9ee3586bc411af8d7381c8bd6404b8449b0c3f69
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
This commit is contained in:
Jit Loon Lim 2023-09-04 14:44:29 +08:00
parent 93823fb6ec
commit 460692afb5
1 changed files with 6 additions and 3 deletions
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9
plat/intel/soc/agilex5/include/socfpga_plat_def.h
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@ -23,9 +23,12 @@
#define PLAT_CPU_ID_MPIDR_AFF_SHIFT MPIDR_AFF1_SHIFT
#define PLAT_L2_RESET_REQ 0xB007C0DE
/* System Counter */ /* TODO: Update back to 400MHz */
#define PLAT_SYS_COUNTER_FREQ_IN_TICKS (80000000)
#define PLAT_SYS_COUNTER_FREQ_IN_MHZ (80)
/* System Counter */
/* TODO: Update back to 400MHz.
* This shall be updated to read from L4 clock instead of hardcoded.
*/
#define PLAT_SYS_COUNTER_FREQ_IN_TICKS (400000000)
#define PLAT_SYS_COUNTER_FREQ_IN_MHZ (400)
/* FPGA config helpers */
#define INTEL_SIP_SMC_FPGA_CONFIG_ADDR 0x400000