diff --git a/plat/mediatek/helpers/armv8_2/arch_helpers.S b/plat/mediatek/helpers/armv8_2/arch_helpers.S new file mode 100644 index 000000000..02d8d530c --- /dev/null +++ b/plat/mediatek/helpers/armv8_2/arch_helpers.S @@ -0,0 +1,118 @@ +/* + * Copyright (c) 2022, Mediatek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include +#include +#include +#include +#if CONFIG_MTK_MCUSYS +#include +#endif +#include + /* + * Declare as weak function so that can be + * overwritten by platform helpers + */ + .weak platform_mem_init + .weak plat_core_pos_by_mpidr + .weak plat_my_core_pos + .weak plat_mediatek_calc_core_pos + .global plat_mpidr_by_core_pos + .global plat_reset_handler + + /* ----------------------------------------------------- + * unsigned long plat_mpidr_by_core_pos(uint32_t cpuid) + * This function calcuate mpidr by cpu pos if cpu + * topology is linear. + * + * Clobbers: x0-x1 + * ----------------------------------------------------- + */ +func plat_mpidr_by_core_pos + lsl x0, x0, #MPIDR_AFF1_SHIFT + mrs x1, mpidr_el1 + and x1, x1, #MPIDR_MT_MASK + orr x0, x0, x1 + ret +endfunc plat_mpidr_by_core_pos + + /* ----------------------------------------------------- + * unsigned int plat_my_core_pos(void) + * This function uses the plat_arm_calc_core_pos() + * definition to get the index of the calling CPU. + * ----------------------------------------------------- + */ +func plat_my_core_pos + mrs x0, mpidr_el1 + b plat_mediatek_calc_core_pos +endfunc plat_my_core_pos + + /* ----------------------------------------------------- + * int plat_mediatek_calc_core_pos(u_register_t mpidr); + * + * In ARMv8.2, AFF2 is cluster id, AFF1 is core id and + * AFF0 is thread id. There is only one cluster in ARMv8.2 + * and one thread in current implementation. + * + * With this function: CorePos = CoreID (AFF1) + * we do it with x0 = (x0 >> 8) & 0xff + * ----------------------------------------------------- + */ +func plat_mediatek_calc_core_pos + b plat_core_pos_by_mpidr +endfunc plat_mediatek_calc_core_pos + + /* ------------------------------------------------------ + * int32_t plat_core_pos_by_mpidr(u_register_t mpidr) + * + * This function implements a part of the critical + * interface between the psci generic layer and the + * platform that allows the former to query the platform + * to convert an MPIDR to a unique linear index. + * + * Clobbers: x0-x1 + * ------------------------------------------------------ + */ +func plat_core_pos_by_mpidr + mov x1, #MPIDR_AFFLVL_MASK + and x0, x1, x0, lsr #MPIDR_AFF1_SHIFT + ret +endfunc plat_core_pos_by_mpidr + + /* -------------------------------------------------------- + * void platform_mem_init (void); + * + * Any memory init, relocation to be done before the + * platform boots. Called very early in the boot process. + * -------------------------------------------------------- + */ +func platform_mem_init + ret +endfunc platform_mem_init + +func plat_reset_handler +#if CONFIG_MTK_MCUSYS + mov x10, x30 + bl plat_my_core_pos + mov x30, x10 + mov w1, #0x1 + lsl w1, w1, w0 + ldr x0, =CPC_MCUSYS_CPU_ON_SW_HINT_SET + str w1, [x0] + dsb sy +#endif + +#if CONFIG_MTK_ECC + mov x10, x30 + /* enable sequence of ecc for cpus */ + bl disable_core_ecc + bl ft_ecc_clear_per_core + bl enable_core_ecc + mov x30, x10 +#endif + + ret +endfunc plat_reset_handler diff --git a/plat/mediatek/helpers/rules.mk b/plat/mediatek/helpers/rules.mk new file mode 100644 index 000000000..ae8068e79 --- /dev/null +++ b/plat/mediatek/helpers/rules.mk @@ -0,0 +1,12 @@ +# +# Copyright (c) 2022, MediaTek Inc. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# + +LOCAL_DIR := $(call GET_LOCAL_DIR) + +MODULE := helpers +LOCAL_SRCS-y += $(LOCAL_DIR)/$(ARCH_VERSION)/arch_helpers.S + +$(eval $(call MAKE_MODULE,$(MODULE),$(LOCAL_SRCS-y),$(MTK_BL))) diff --git a/plat/mediatek/include/armv8_2/arch_def.h b/plat/mediatek/include/armv8_2/arch_def.h new file mode 100644 index 000000000..61f818fca --- /dev/null +++ b/plat/mediatek/include/armv8_2/arch_def.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2022, Mediatek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARCH_DEF_H +#define ARCH_DEF_H + +/* Topology constants */ +#define PLAT_MAX_PWR_LVL (2) +#define PLAT_MAX_RET_STATE (1) +#define PLAT_MAX_OFF_STATE (2) + +#define PLATFORM_SYSTEM_COUNT (1) +#define PLATFORM_CLUSTER_COUNT (1) +#define PLATFORM_CLUSTER0_CORE_COUNT (8) +#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT) +#define PLATFORM_MAX_CPUS_PER_CLUSTER (8) +#define PLATFORM_NUM_AFFS (PLATFORM_SYSTEM_COUNT + \ + PLATFORM_CLUSTER_COUNT + \ + PLATFORM_CORE_COUNT) + +/******************************************************************************* + * Declarations and constants to access the mailboxes safely. Each mailbox is + * aligned on the biggest cache line size in the platform. This is known only + * to the platform as it might have a combination of integrated and external + * caches. Such alignment ensures that two maiboxes do not sit on the same cache + * line at any cache level. They could belong to different cpus/clusters & + * get written while being protected by different locks causing corruption of + * a valid mailbox address. + ******************************************************************************/ +/* Cachline size */ +#define CACHE_WRITEBACK_SHIFT (6) +#define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) + +#endif /* ARCH_DEF_H */ + diff --git a/plat/mediatek/include/mt8188/platform_def.h b/plat/mediatek/include/mt8188/platform_def.h index 023483740..3e82cefdd 100644 --- a/plat/mediatek/include/mt8188/platform_def.h +++ b/plat/mediatek/include/mt8188/platform_def.h @@ -7,6 +7,8 @@ #ifndef PLATFORM_DEF_H #define PLATFORM_DEF_H +#include + #define PLAT_PRIMARY_CPU (0x0) #define MT_GIC_BASE (0x0C000000) @@ -124,22 +126,7 @@ * Generic platform constants ******************************************************************************/ #define PLATFORM_STACK_SIZE (0x800) - #define FIRMWARE_WELCOME_STR "Booting Trusted Firmware\n" - -#define PLAT_MAX_PWR_LVL U(3) -#define PLAT_MAX_RET_STATE U(1) -#define PLAT_MAX_OFF_STATE U(9) - -#define PLATFORM_SYSTEM_COUNT U(1) -#define PLATFORM_MCUSYS_COUNT U(1) -#define PLATFORM_CLUSTER_COUNT U(1) -#define PLATFORM_CLUSTER0_CORE_COUNT U(8) -#define PLATFORM_CLUSTER1_CORE_COUNT U(0) - -#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT) -#define PLATFORM_MAX_CPUS_PER_CLUSTER U(8) - #define SOC_CHIP_ID U(0x8188) /******************************************************************************* @@ -167,16 +154,4 @@ #define MAX_XLAT_TABLES (16) #define MAX_MMAP_REGIONS (16) -/******************************************************************************* - * Declarations and constants to access the mailboxes safely. Each mailbox is - * aligned on the biggest cache line size in the platform. This is known only - * to the platform as it might have a combination of integrated and external - * caches. Such alignment ensures that two maiboxes do not sit on the same cache - * line at any cache level. They could belong to different cpus/clusters & - * get written while being protected by different locks causing corruption of - * a valid mailbox address. - ******************************************************************************/ -#define CACHE_WRITEBACK_SHIFT (6) -#define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) - #endif /* PLATFORM_DEF_H */ diff --git a/plat/mediatek/mt8188/aarch64/plat_helpers.S b/plat/mediatek/mt8188/aarch64/plat_helpers.S deleted file mode 100644 index 7073ab1a5..000000000 --- a/plat/mediatek/mt8188/aarch64/plat_helpers.S +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include - - .globl plat_is_my_cpu_primary - .globl plat_my_core_pos - .globl plat_mediatek_calc_core_pos - -func plat_is_my_cpu_primary - mrs x0, mpidr_el1 - and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) - cmp x0, #PLAT_PRIMARY_CPU - cset x0, eq - ret -endfunc plat_is_my_cpu_primary - - /* ----------------------------------------------------- - * unsigned int plat_my_core_pos(void) - * This function uses the plat_mediatek_calc_core_pos() - * definition to get the index of the calling CPU. - * ----------------------------------------------------- - */ -func plat_my_core_pos - mrs x0, mpidr_el1 - b plat_mediatek_calc_core_pos -endfunc plat_my_core_pos - - /* ----------------------------------------------------- - * unsigned int plat_mediatek_calc_core_pos(u_register_t mpidr); - * - * With this function: CorePos = CoreID (AFF1) - * we do it with x0 = (x0 >> 8) & 0xff - * ----------------------------------------------------- - */ -func plat_mediatek_calc_core_pos - mov x1, #MPIDR_AFFLVL_MASK - and x0, x1, x0, lsr #MPIDR_AFF1_SHIFT - ret -endfunc plat_mediatek_calc_core_pos diff --git a/plat/mediatek/mt8188/plat_config.mk b/plat/mediatek/mt8188/plat_config.mk index a69ea9640..169f7764b 100644 --- a/plat/mediatek/mt8188/plat_config.mk +++ b/plat/mediatek/mt8188/plat_config.mk @@ -32,5 +32,6 @@ ERRATA_A78_2242635 := 1 ERRATA_A78_2376745 := 1 ERRATA_A78_2395406 := 1 +CONFIG_ARCH_ARM_V8_2 := y MACH_MT8188 := 1 $(eval $(call add_define,MACH_MT8188)) diff --git a/plat/mediatek/mt8188/plat_topology.c b/plat/mediatek/mt8188/plat_topology.c deleted file mode 100644 index 9fa285589..000000000 --- a/plat/mediatek/mt8188/plat_topology.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2022, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include - -#include -#include - -const unsigned char mtk_power_domain_tree_desc[] = { - /* Number of root nodes */ - PLATFORM_SYSTEM_COUNT, - /* Number of children for the root node */ - PLATFORM_MCUSYS_COUNT, - /* Number of children for the mcusys node */ - PLATFORM_CLUSTER_COUNT, - /* Number of children for the first cluster node */ - PLATFORM_CLUSTER0_CORE_COUNT, -}; - -const unsigned char *plat_get_power_domain_tree_desc(void) -{ - return mtk_power_domain_tree_desc; -} - -/******************************************************************************* - * This function implements a part of the critical interface between the psci - * generic layer and the platform that allows the former to query the platform - * to convert an MPIDR to a unique linear index. An error code (-1) is returned - * in case the MPIDR is invalid. - ******************************************************************************/ -int plat_core_pos_by_mpidr(u_register_t mpidr) -{ - unsigned int cluster_id, cpu_id; - - if ((read_mpidr() & MPIDR_MT_MASK) != 0) { - /* ARMv8.2 arch */ - if ((mpidr & (MPIDR_AFFLVL_MASK << MPIDR_AFF0_SHIFT)) != 0) { - return -1; - } - return plat_mediatek_calc_core_pos(mpidr); - } - - mpidr &= MPIDR_AFFINITY_MASK; - - if ((mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) != 0) { - return -1; - } - - cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; - cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; - - if (cluster_id >= PLATFORM_CLUSTER_COUNT) { - return -1; - } - - /* - * Validate cpu_id by checking whether it represents a CPU in - * one of the two clusters present on the platform. - */ - if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) { - return -1; - } - - return (cpu_id + (cluster_id * 8)); -} diff --git a/plat/mediatek/mt8188/platform.mk b/plat/mediatek/mt8188/platform.mk index 4233d920a..aaf97758c 100644 --- a/plat/mediatek/mt8188/platform.mk +++ b/plat/mediatek/mt8188/platform.mk @@ -15,6 +15,7 @@ include lib/xlat_tables_v2/xlat_tables.mk PLAT_INCLUDES := -I${MTK_PLAT}/common \ -I${MTK_PLAT}/include \ -I${MTK_PLAT}/include/${MTK_SOC} \ + -I${MTK_PLAT}/include/${ARCH_VERSION} \ -I${MTK_PLAT} \ -I${MTK_PLAT_SOC}/include \ -Idrivers/arm/gic \ @@ -36,6 +37,8 @@ MODULES-y += $(MTK_PLAT)/drivers/pmic MODULES-y += $(MTK_PLAT)/drivers/pmic_wrap MODULES-y += $(MTK_PLAT)/drivers/rtc MODULES-y += $(MTK_PLAT)/drivers/timer +MODULES-y += $(MTK_PLAT)/helpers +MODULES-y += $(MTK_PLAT)/topology PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \ drivers/ti/uart/aarch64/16550_console.S \ @@ -52,9 +55,7 @@ BL31_SOURCES += drivers/delay_timer/delay_timer.c \ plat/common/aarch64/crash_console_helpers.S \ ${MTK_PLAT}/common/mtk_plat_common.c \ ${MTK_PLAT}/common/params_setup.c \ - ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ - $(MTK_PLAT)/$(MTK_SOC)/plat_mmap.c \ - $(MTK_PLAT)/$(MTK_SOC)/plat_topology.c + $(MTK_PLAT)/$(MTK_SOC)/plat_mmap.c include plat/mediatek/build_helpers/mtk_build_helpers_epilogue.mk diff --git a/plat/mediatek/topology/armv8_2/topology.c b/plat/mediatek/topology/armv8_2/topology.c new file mode 100644 index 000000000..1627bbdb0 --- /dev/null +++ b/plat/mediatek/topology/armv8_2/topology.c @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2022, Mediatek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include +#include +#include + +#pragma weak plat_get_power_domain_tree_desc + +static const unsigned char mtk_power_domain_tree_desc[] = { + /* Number of root nodes */ + PLATFORM_SYSTEM_COUNT, + /* Number of children for the root node */ + PLATFORM_CLUSTER_COUNT, + /* Number of children for the first cluster node */ + PLATFORM_CLUSTER0_CORE_COUNT, +}; + +/******************************************************************************* + * This function returns the default topology tree information. + ******************************************************************************/ +const unsigned char *plat_get_power_domain_tree_desc(void) +{ + return mtk_power_domain_tree_desc; +} diff --git a/plat/mediatek/topology/rules.mk b/plat/mediatek/topology/rules.mk new file mode 100644 index 000000000..29f15bbb5 --- /dev/null +++ b/plat/mediatek/topology/rules.mk @@ -0,0 +1,12 @@ +# +# Copyright (c) 2022, MediaTek Inc. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# + +LOCAL_DIR := $(call GET_LOCAL_DIR) + +MODULE := topology +LOCAL_SRCS-y := $(LOCAL_DIR)/$(ARCH_VERSION)/topology.c + +$(eval $(call MAKE_MODULE,$(MODULE),$(LOCAL_SRCS-y),$(MTK_BL)))