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refactor(st-gpio): code improvements

Browse source 
No functional, change, but some improvements:
- Declare set_gpio() as static (only called locally)
- Handle the type ('open-drain') property independently from the
  mode one.
- Replace mmio_clrbits_32() +  mmio_setbits_32() with
  mmio_clrsetbits_32().
- Add a missing log
- Add missing U() in macro definitions

Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Change-Id: I1a79609609ac8e8001127ebefdb81def573f76fa
This commit is contained in:
Fabien Dessenne 2021-09-21 11:05:06 +02:00 • committed by Yann Gautier
parent 6cacfe2959
commit 417196faef
2 changed files with 56 additions and 52 deletions
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78
drivers/st/gpio/stm32_gpio.c
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2016-2021, STMicroelectronics - All Rights Reserved * Copyright (c) 2016-2022, STMicroelectronics - All Rights Reserved
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -8,10 +8,6 @@
#include <errno.h> #include <errno.h>
#include <stdbool.h> #include <stdbool.h>
#include <libfdt.h>
#include <platform_def.h>
#include <common/bl_common.h> #include <common/bl_common.h>
#include <common/debug.h> #include <common/debug.h>
#include <drivers/clk.h> #include <drivers/clk.h>
@ -19,6 +15,9 @@
#include <drivers/st/stm32mp_clkfunc.h> #include <drivers/st/stm32mp_clkfunc.h>
#include <lib/mmio.h> #include <lib/mmio.h>
#include <lib/utils_def.h> #include <lib/utils_def.h>
#include <libfdt.h>
#include <platform_def.h>
#define DT_GPIO_BANK_SHIFT 12 #define DT_GPIO_BANK_SHIFT 12
#define DT_GPIO_BANK_MASK GENMASK(16, 12) #define DT_GPIO_BANK_MASK GENMASK(16, 12)
@ -26,6 +25,10 @@
#define DT_GPIO_PIN_MASK GENMASK(11, 8) #define DT_GPIO_PIN_MASK GENMASK(11, 8)
#define DT_GPIO_MODE_MASK GENMASK(7, 0) #define DT_GPIO_MODE_MASK GENMASK(7, 0)
static void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t type,
uint32_t speed, uint32_t pull, uint32_t alternate,
uint8_t status);
/******************************************************************************* /*******************************************************************************
* This function gets GPIO bank node in DT. * This function gets GPIO bank node in DT.
* Returns node offset if status is okay in DT, else return 0 * Returns node offset if status is okay in DT, else return 0
@ -100,6 +103,7 @@ static int dt_set_gpio_config(void *fdt, int node, uint8_t status)
uint32_t pin; uint32_t pin;
uint32_t mode; uint32_t mode;
uint32_t alternate = GPIO_ALTERNATE_(0); uint32_t alternate = GPIO_ALTERNATE_(0);
uint32_t type;
int bank_node; int bank_node;
int clk; int clk;
@ -129,7 +133,9 @@ static int dt_set_gpio_config(void *fdt, int node, uint8_t status)
} }
if (fdt_getprop(fdt, node, "drive-open-drain", NULL) != NULL) { if (fdt_getprop(fdt, node, "drive-open-drain", NULL) != NULL) {
mode |= GPIO_OPEN_DRAIN; type = GPIO_TYPE_OPEN_DRAIN;
} else {
type = GPIO_TYPE_PUSH_PULL;
} }
bank_node = ckeck_gpio_bank(fdt, bank, pinctrl_node); bank_node = ckeck_gpio_bank(fdt, bank, pinctrl_node);
@ -146,7 +152,7 @@ static int dt_set_gpio_config(void *fdt, int node, uint8_t status)
/* Platform knows the clock: assert it is okay */ /* Platform knows the clock: assert it is okay */
assert((unsigned long)clk == stm32_get_gpio_bank_clock(bank)); assert((unsigned long)clk == stm32_get_gpio_bank_clock(bank));
set_gpio(bank, pin, mode, speed, pull, alternate, status); set_gpio(bank, pin, mode, type, speed, pull, alternate, status);
} }
return 0; return 0;
@ -160,7 +166,7 @@ static int dt_set_gpio_config(void *fdt, int node, uint8_t status)
int dt_set_pinctrl_config(int node) int dt_set_pinctrl_config(int node)
{ {
const fdt32_t *cuint; const fdt32_t *cuint;
int lenp = 0; int lenp;
uint32_t i; uint32_t i;
uint8_t status; uint8_t status;
void *fdt; void *fdt;
@ -201,8 +207,9 @@ int dt_set_pinctrl_config(int node)
return 0; return 0;
} }
void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t speed, static void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t type,
uint32_t pull, uint32_t alternate, uint8_t status) uint32_t speed, uint32_t pull, uint32_t alternate,
uint8_t status)
{ {
uintptr_t base = stm32_get_gpio_bank_base(bank); uintptr_t base = stm32_get_gpio_bank_base(bank);
unsigned long clock = stm32_get_gpio_bank_clock(bank); unsigned long clock = stm32_get_gpio_bank_clock(bank);
@ -211,41 +218,38 @@ void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t speed,
clk_enable(clock); clk_enable(clock);
mmio_clrbits_32(base + GPIO_MODE_OFFSET, mmio_clrsetbits_32(base + GPIO_MODE_OFFSET,
((uint32_t)GPIO_MODE_MASK << (pin << 1))); (uint32_t)GPIO_MODE_MASK << (pin << 1),
mmio_setbits_32(base + GPIO_MODE_OFFSET, mode << (pin << 1));
(mode & ~GPIO_OPEN_DRAIN) << (pin << 1));
if ((mode & GPIO_OPEN_DRAIN) != 0U) { mmio_clrsetbits_32(base + GPIO_TYPE_OFFSET,
mmio_setbits_32(base + GPIO_TYPE_OFFSET, BIT(pin)); (uint32_t)GPIO_TYPE_MASK << pin,
} else { type << pin);
mmio_clrbits_32(base + GPIO_TYPE_OFFSET, BIT(pin));
}
mmio_clrbits_32(base + GPIO_SPEED_OFFSET, mmio_clrsetbits_32(base + GPIO_SPEED_OFFSET,
((uint32_t)GPIO_SPEED_MASK << (pin << 1))); (uint32_t)GPIO_SPEED_MASK << (pin << 1),
mmio_setbits_32(base + GPIO_SPEED_OFFSET, speed << (pin << 1)); speed << (pin << 1));
mmio_clrbits_32(base + GPIO_PUPD_OFFSET, mmio_clrsetbits_32(base + GPIO_PUPD_OFFSET,
((uint32_t)GPIO_PULL_MASK << (pin << 1))); (uint32_t)GPIO_PULL_MASK << (pin << 1),
mmio_setbits_32(base + GPIO_PUPD_OFFSET, pull << (pin << 1)); pull << (pin << 1));
if (pin < GPIO_ALT_LOWER_LIMIT) { if (pin < GPIO_ALT_LOWER_LIMIT) {
mmio_clrbits_32(base + GPIO_AFRL_OFFSET, mmio_clrsetbits_32(base + GPIO_AFRL_OFFSET,
((uint32_t)GPIO_ALTERNATE_MASK << (pin << 2))); (uint32_t)GPIO_ALTERNATE_MASK << (pin << 2),
mmio_setbits_32(base + GPIO_AFRL_OFFSET, alternate << (pin << 2));
alternate << (pin << 2));
} else { } else {
mmio_clrbits_32(base + GPIO_AFRH_OFFSET, size_t shift = (pin - GPIO_ALT_LOWER_LIMIT) << 2;
((uint32_t)GPIO_ALTERNATE_MASK <<
((pin - GPIO_ALT_LOWER_LIMIT) << 2))); mmio_clrsetbits_32(base + GPIO_AFRH_OFFSET,
mmio_setbits_32(base + GPIO_AFRH_OFFSET, (uint32_t)GPIO_ALTERNATE_MASK << shift,
alternate << ((pin - GPIO_ALT_LOWER_LIMIT) << alternate << shift);
2));
} }
VERBOSE("GPIO %u mode set to 0x%x\n", bank, VERBOSE("GPIO %u mode set to 0x%x\n", bank,
mmio_read_32(base + GPIO_MODE_OFFSET)); mmio_read_32(base + GPIO_MODE_OFFSET));
VERBOSE("GPIO %u type set to 0x%x\n", bank,
mmio_read_32(base + GPIO_TYPE_OFFSET));
VERBOSE("GPIO %u speed set to 0x%x\n", bank, VERBOSE("GPIO %u speed set to 0x%x\n", bank,
mmio_read_32(base + GPIO_SPEED_OFFSET)); mmio_read_32(base + GPIO_SPEED_OFFSET));
VERBOSE("GPIO %u mode pull to 0x%x\n", bank, VERBOSE("GPIO %u mode pull to 0x%x\n", bank,
@ -287,7 +291,7 @@ void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure)
void set_gpio_reset_cfg(uint32_t bank, uint32_t pin) void set_gpio_reset_cfg(uint32_t bank, uint32_t pin)
{ {
set_gpio(bank, pin, GPIO_MODE_ANALOG, GPIO_SPEED_LOW, set_gpio(bank, pin, GPIO_MODE_ANALOG, GPIO_TYPE_PUSH_PULL,
GPIO_NO_PULL, GPIO_ALTERNATE_(0), DT_DISABLED); GPIO_SPEED_LOW, GPIO_NO_PULL, GPIO_ALTERNATE_(0), DT_DISABLED);
set_gpio_secure_cfg(bank, pin, stm32_gpio_is_secure_at_reset(bank)); set_gpio_secure_cfg(bank, pin, stm32_gpio_is_secure_at_reset(bank));
} }

30
include/drivers/st/stm32_gpio.h
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2015-2021, STMicroelectronics - All Rights Reserved * Copyright (c) 2015-2022, STMicroelectronics - All Rights Reserved
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -26,31 +26,31 @@
#define GPIO_ALTERNATE_(_x) U(_x) #define GPIO_ALTERNATE_(_x) U(_x)
#define GPIO_ALTERNATE_MASK U(0x0F) #define GPIO_ALTERNATE_MASK U(0x0F)
#define GPIO_MODE_INPUT 0x00 #define GPIO_MODE_INPUT U(0x00)
#define GPIO_MODE_OUTPUT 0x01 #define GPIO_MODE_OUTPUT U(0x01)
#define GPIO_MODE_ALTERNATE 0x02 #define GPIO_MODE_ALTERNATE U(0x02)
#define GPIO_MODE_ANALOG 0x03 #define GPIO_MODE_ANALOG U(0x03)
#define GPIO_MODE_MASK U(0x03) #define GPIO_MODE_MASK U(0x03)
#define GPIO_OPEN_DRAIN U(0x10) #define GPIO_TYPE_PUSH_PULL U(0x00)
#define GPIO_TYPE_OPEN_DRAIN U(0x01)
#define GPIO_TYPE_MASK U(0x01)
#define GPIO_SPEED_LOW 0x00 #define GPIO_SPEED_LOW U(0x00)
#define GPIO_SPEED_MEDIUM 0x01 #define GPIO_SPEED_MEDIUM U(0x01)
#define GPIO_SPEED_HIGH 0x02 #define GPIO_SPEED_HIGH U(0x02)
#define GPIO_SPEED_VERY_HIGH 0x03 #define GPIO_SPEED_VERY_HIGH U(0x03)
#define GPIO_SPEED_MASK U(0x03) #define GPIO_SPEED_MASK U(0x03)
#define GPIO_NO_PULL 0x00 #define GPIO_NO_PULL U(0x00)
#define GPIO_PULL_UP 0x01 #define GPIO_PULL_UP U(0x01)
#define GPIO_PULL_DOWN 0x02 #define GPIO_PULL_DOWN U(0x02)
#define GPIO_PULL_MASK U(0x03) #define GPIO_PULL_MASK U(0x03)
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
#include <stdint.h> #include <stdint.h>
int dt_set_pinctrl_config(int node); int dt_set_pinctrl_config(int node);
void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t speed,
uint32_t pull, uint32_t alternate, uint8_t status);
void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure); void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure);
void set_gpio_reset_cfg(uint32_t bank, uint32_t pin); void set_gpio_reset_cfg(uint32_t bank, uint32_t pin);
#endif /*__ASSEMBLER__*/ #endif /*__ASSEMBLER__*/