Merge changes If374b491,I6b63b9c6 into integration

* changes:
  fix(qemu): exclude GPT reserve from BL32_MEM_SIZE
  fix(qemu): fix L0 GPT page table mapping
This commit is contained in:
Soby Mathew 2024-09-11 12:27:22 +02:00 committed by TrustedFirmware Code Review
commit 416616567a

View file

@ -184,7 +184,7 @@
# define BL32_LIMIT (BL32_SRAM_LIMIT - FW_HANDOFF_SIZE)
#elif BL32_RAM_LOCATION_ID == SEC_DRAM_ID
# define BL32_MEM_BASE SEC_DRAM_BASE
# define BL32_MEM_SIZE SEC_DRAM_SIZE
# define BL32_MEM_SIZE (SEC_DRAM_SIZE - RME_GPT_DRAM_SIZE)
# define BL32_BASE BL32_DRAM_BASE
# define BL32_LIMIT (BL32_DRAM_LIMIT - FW_HANDOFF_SIZE)
#else
@ -379,7 +379,8 @@ CASSERT((PLAT_QEMU_L0_GPT_BASE & (PLAT_QEMU_L0_GPT_SIZE - 1)) == 0,
#define MAP_GPT_L0_REGION MAP_REGION_FLAT( \
PLAT_QEMU_L0_GPT_BASE, \
PLAT_QEMU_L0_GPT_SIZE, \
PLAT_QEMU_L0_GPT_SIZE + \
PLAT_QEMU_GPT_BITLOCK_SIZE, \
MT_MEMORY | MT_RW | EL3_PAS)
#define MAP_GPT_L1_REGION MAP_REGION_FLAT( \