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doc: Move documents into subdirectories
This change creates the following directories under docs/ in order to provide a grouping for the content: - components - design - getting_started - perf - process In each of these directories an index.rst file is created and this serves as an index / landing page for each of the groups when the pages are compiled. Proper layout of the top-level table of contents relies on this directory/index structure. Without this patch it is possible to build the documents correctly with Sphinx but the output looks messy because there is no overall hierarchy. Change-Id: I3c9f4443ec98571a56a6edf775f2c8d74d7f429f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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docs/components/platform-interrupt-controller-API.rst
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docs/components/platform-interrupt-controller-API.rst
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Platform Interrupt Controller API documentation
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===============================================
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.. contents::
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This document lists the optional platform interrupt controller API that
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abstracts the runtime configuration and control of interrupt controller from the
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generic code. The mandatory APIs are described in the `porting guide`__.
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.. __: ../getting_started/porting-guide.rst#interrupt-management-framework-in-bl31
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Function: unsigned int plat_ic_get_running_priority(void); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : void
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Return : unsigned int
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This API should return the priority of the interrupt the PE is currently
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servicing. This must be be called only after an interrupt has already been
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acknowledged via ``plat_ic_acknowledge_interrupt``.
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In the case of Arm standard platforms using GIC, the *Running Priority Register*
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is read to determine the priority of the interrupt.
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Function: int plat_ic_is_spi(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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The API should return whether the interrupt ID (first parameter) is categorized
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as a Shared Peripheral Interrupt. Shared Peripheral Interrupts are typically
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associated to system-wide peripherals, and these interrupts can target any PE in
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the system.
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Function: int plat_ic_is_ppi(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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The API should return whether the interrupt ID (first parameter) is categorized
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as a Private Peripheral Interrupt. Private Peripheral Interrupts are typically
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associated with peripherals that are private to each PE. Interrupts from private
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peripherals target to that PE only.
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Function: int plat_ic_is_sgi(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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The API should return whether the interrupt ID (first parameter) is categorized
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as a Software Generated Interrupt. Software Generated Interrupts are raised by
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explicit programming by software, and are typically used in inter-PE
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communication. Secure SGIs are reserved for use by Secure world software.
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Function: unsigned int plat_ic_get_interrupt_active(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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This API should return the *active* status of the interrupt ID specified by the
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first parameter, ``id``.
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In case of Arm standard platforms using GIC, the implementation of the API reads
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the GIC *Set Active Register* to read and return the active status of the
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interrupt.
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Function: void plat_ic_enable_interrupt(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : void
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This API should enable the interrupt ID specified by the first parameter,
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``id``. PEs in the system are expected to receive only enabled interrupts.
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In case of Arm standard platforms using GIC, the implementation of the API
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inserts barrier to make memory updates visible before enabling interrupt, and
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then writes to GIC *Set Enable Register* to enable the interrupt.
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Function: void plat_ic_disable_interrupt(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : void
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This API should disable the interrupt ID specified by the first parameter,
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``id``. PEs in the system are not expected to receive disabled interrupts.
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In case of Arm standard platforms using GIC, the implementation of the API
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writes to GIC *Clear Enable Register* to disable the interrupt, and inserts
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barrier to make memory updates visible afterwards.
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Function: void plat_ic_set_interrupt_priority(unsigned int id, unsigned int priority); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Argument : unsigned int
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Return : void
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This API should set the priority of the interrupt specified by first parameter
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``id`` to the value set by the second parameter ``priority``.
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In case of Arm standard platforms using GIC, the implementation of the API
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writes to GIC *Priority Register* set interrupt priority.
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Function: int plat_ic_has_interrupt_type(unsigned int type); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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This API should return whether the platform supports a given interrupt type. The
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parameter ``type`` shall be one of ``INTR_TYPE_EL3``, ``INTR_TYPE_S_EL1``, or
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``INTR_TYPE_NS``.
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In case of Arm standard platforms using GICv3, the implementation of the API
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returns ``1`` for all interrupt types.
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In case of Arm standard platforms using GICv2, the API always return ``1`` for
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``INTR_TYPE_NS``. Return value for other types depends on the value of build
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option ``GICV2_G0_FOR_EL3``:
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- For interrupt type ``INTR_TYPE_EL3``:
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- When ``GICV2_G0_FOR_EL3`` is ``0``, it returns ``0``, indicating no support
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for EL3 interrupts.
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- When ``GICV2_G0_FOR_EL3`` is ``1``, it returns ``1``, indicating support for
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EL3 interrupts.
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- For interrupt type ``INTR_TYPE_S_EL1``:
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- When ``GICV2_G0_FOR_EL3`` is ``0``, it returns ``1``, indicating support for
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Secure EL1 interrupts.
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- When ``GICV2_G0_FOR_EL3`` is ``1``, it returns ``0``, indicating no support
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for Secure EL1 interrupts.
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Function: void plat_ic_set_interrupt_type(unsigned int id, unsigned int type); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Argument : unsigned int
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Return : void
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This API should set the interrupt specified by first parameter ``id`` to the
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type specified by second parameter ``type``. The ``type`` parameter can be
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one of:
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- ``INTR_TYPE_NS``: interrupt is meant to be consumed by the Non-secure world.
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- ``INTR_TYPE_S_EL1``: interrupt is meant to be consumed by Secure EL1.
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- ``INTR_TYPE_EL3``: interrupt is meant to be consumed by EL3.
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In case of Arm standard platforms using GIC, the implementation of the API
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writes to the GIC *Group Register* and *Group Modifier Register* (only GICv3) to
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assign the interrupt to the right group.
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For GICv3:
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- ``INTR_TYPE_NS`` maps to Group 1 interrupt.
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- ``INTR_TYPE_S_EL1`` maps to Secure Group 1 interrupt.
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- ``INTR_TYPE_EL3`` maps to Secure Group 0 interrupt.
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For GICv2:
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- ``INTR_TYPE_NS`` maps to Group 1 interrupt.
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- When the build option ``GICV2_G0_FOR_EL3`` is set to ``0`` (the default),
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``INTR_TYPE_S_EL1`` maps to Group 0. Otherwise, ``INTR_TYPE_EL3`` maps to
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Group 0 interrupt.
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Function: void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : int
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Argument : u_register_t
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Return : void
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This API should raise an EL3 SGI. The first parameter, ``sgi_num``, specifies
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the ID of the SGI. The second parameter, ``target``, must be the MPIDR of the
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target PE.
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In case of Arm standard platforms using GIC, the implementation of the API
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inserts barrier to make memory updates visible before raising SGI, then writes
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to appropriate *SGI Register* in order to raise the EL3 SGI.
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Function: void plat_ic_set_spi_routing(unsigned int id, unsigned int routing_mode, u_register_t mpidr); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Argument : unsigned int
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Argument : u_register_t
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Return : void
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This API should set the routing mode of Share Peripheral Interrupt (SPI)
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specified by first parameter ``id`` to that specified by the second parameter
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``routing_mode``.
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The ``routing_mode`` parameter can be one of:
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- ``INTR_ROUTING_MODE_ANY`` means the interrupt can be routed to any PE in the
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system. The ``mpidr`` parameter is ignored in this case.
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- ``INTR_ROUTING_MODE_PE`` means the interrupt is routed to the PE whose MPIDR
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value is specified by the parameter ``mpidr``.
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In case of Arm standard platforms using GIC, the implementation of the API
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writes to the GIC *Target Register* (GICv2) or *Route Register* (GICv3) to set
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the routing.
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Function: void plat_ic_set_interrupt_pending(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : void
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This API should set the interrupt specified by first parameter ``id`` to
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*Pending*.
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In case of Arm standard platforms using GIC, the implementation of the API
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inserts barrier to make memory updates visible before setting interrupt pending,
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and writes to the GIC *Set Pending Register* to set the interrupt pending
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status.
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Function: void plat_ic_clear_interrupt_pending(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : void
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This API should clear the *Pending* status of the interrupt specified by first
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parameter ``id``.
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In case of Arm standard platforms using GIC, the implementation of the API
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writes to the GIC *Clear Pending Register* to clear the interrupt pending
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status, and inserts barrier to make memory updates visible afterwards.
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Function: unsigned int plat_ic_set_priority_mask(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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This API should set the priority mask (first parameter) in the interrupt
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controller such that only interrupts of higher priority than the supplied one
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may be signalled to the PE. The API should return the current priority value
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that it's overwriting.
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In case of Arm standard platforms using GIC, the implementation of the API
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inserts to order memory updates before updating mask, then writes to the GIC
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*Priority Mask Register*, and make sure memory updates are visible before
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potential trigger due to mask update.
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Function: unsigned int plat_ic_get_interrupt_id(unsigned int raw); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : unsigned int
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This API should extract and return the interrupt number from the raw value
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obtained by the acknowledging the interrupt (read using
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``plat_ic_acknowledge_interrupt()``). If the interrupt ID is invalid, this API
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should return ``INTR_ID_UNAVAILABLE``.
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In case of Arm standard platforms using GIC, the implementation of the API
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masks out the interrupt ID field from the acknowledged value from GIC.
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----
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*Copyright (c) 2017-2018, Arm Limited and Contributors. All rights reserved.*
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