fix(zynqmp): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ibff3df16b4c591384467771bc7cb316f1773f1ea
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
This commit is contained in:
Maheedhar Bollapalli 2024-11-04 08:44:54 +00:00
parent baeeaddff4
commit 3f6d47945a
9 changed files with 455 additions and 248 deletions

View file

@ -57,12 +57,15 @@ static uint32_t zynqmp_get_silicon_ver(void)
uint32_t get_uart_clk(void) uint32_t get_uart_clk(void)
{ {
unsigned int ver = zynqmp_get_silicon_ver(); unsigned int ver = zynqmp_get_silicon_ver();
uint32_t uart_clk = 0U;
if (ver == ZYNQMP_CSU_VERSION_QEMU) { if (ver == ZYNQMP_CSU_VERSION_QEMU) {
return 133000000; uart_clk = 133000000U;
} else { } else {
return 100000000; uart_clk = 100000000U;
} }
return uart_clk;
} }
#if LOG_LEVEL >= LOG_LEVEL_NOTICE #if LOG_LEVEL >= LOG_LEVEL_NOTICE
@ -312,14 +315,17 @@ static char *zynqmp_print_silicon_idcode(void)
int32_t plat_is_smccc_feature_available(u_register_t fid) int32_t plat_is_smccc_feature_available(u_register_t fid)
{ {
int32_t ret = SMC_ARCH_CALL_NOT_SUPPORTED;
switch (fid) { switch (fid) {
case SMCCC_ARCH_SOC_ID: case SMCCC_ARCH_SOC_ID:
return SMC_ARCH_CALL_SUCCESS; ret = SMC_ARCH_CALL_SUCCESS;
break;
default: default:
return SMC_ARCH_CALL_NOT_SUPPORTED; break;
} }
return SMC_ARCH_CALL_NOT_SUPPORTED; return ret;
} }
int32_t plat_get_soc_version(void) int32_t plat_get_soc_version(void)
@ -408,10 +414,13 @@ void zynqmp_config_setup(void)
uint32_t plat_get_syscnt_freq2(void) uint32_t plat_get_syscnt_freq2(void)
{ {
uint32_t ver = zynqmp_get_silicon_ver(); uint32_t ver = zynqmp_get_silicon_ver();
uint32_t ret = 0U;
if (ver == ZYNQMP_CSU_VERSION_QEMU) { if (ver == ZYNQMP_CSU_VERSION_QEMU) {
return 65000000; ret = 65000000U;
} else { } else {
return mmio_read_32((uint64_t)IOU_SCNTRS_BASEFREQ); ret = mmio_read_32((uint64_t)IOU_SCNTRS_BASEFREQ);
} }
return ret;
} }

View file

@ -36,22 +36,23 @@ static int32_t zynqmp_pwr_domain_on(u_register_t mpidr)
const struct pm_proc *proc; const struct pm_proc *proc;
uint32_t buff[3]; uint32_t buff[3];
enum pm_ret_status ret; enum pm_ret_status ret;
int32_t result = PSCI_E_INTERN_FAIL;
VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr); VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
if (cpu_id == -1) { if (cpu_id == -1) {
return PSCI_E_INTERN_FAIL; goto exit_label;
} }
proc = pm_get_proc(cpu_id); proc = pm_get_proc(cpu_id);
if (proc == NULL) { if (proc == NULL) {
return PSCI_E_INTERN_FAIL; goto exit_label;
} }
/* Check the APU proc status before wakeup */ /* Check the APU proc status before wakeup */
ret = pm_get_node_status(proc->node_id, buff); ret = pm_get_node_status(proc->node_id, buff);
if ((ret != PM_RET_SUCCESS) || (buff[0] == PM_PROC_STATE_SUSPENDING)) { if ((ret != PM_RET_SUCCESS) || (buff[0] == PM_PROC_STATE_SUSPENDING)) {
return PSCI_E_INTERN_FAIL; goto exit_label;
} }
/* Clear power down request */ /* Clear power down request */
@ -60,7 +61,10 @@ static int32_t zynqmp_pwr_domain_on(u_register_t mpidr)
/* Send request to PMU to wake up selected APU CPU core */ /* Send request to PMU to wake up selected APU CPU core */
(void)pm_req_wakeup(proc->node_id, 1, zynqmp_sec_entry, REQ_ACK_BLOCKING); (void)pm_req_wakeup(proc->node_id, 1, zynqmp_sec_entry, REQ_ACK_BLOCKING);
return PSCI_E_SUCCESS; result = PSCI_E_SUCCESS;
exit_label:
return result;
} }
static void zynqmp_pwr_domain_off(const psci_power_state_t *target_state) static void zynqmp_pwr_domain_off(const psci_power_state_t *target_state)
@ -195,6 +199,7 @@ static int32_t zynqmp_validate_power_state(uint32_t power_state,
VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
uint32_t pstate = psci_get_pstate_type(power_state); uint32_t pstate = psci_get_pstate_type(power_state);
int32_t result = PSCI_E_INVALID_PARAMS;
assert(req_state); assert(req_state);
@ -205,11 +210,11 @@ static int32_t zynqmp_validate_power_state(uint32_t power_state,
req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
} }
/* We expect the 'state id' to be zero */ /* We expect the 'state id' to be zero */
if (psci_get_pstate_id(power_state) != 0U) { if (psci_get_pstate_id(power_state) == 0U) {
return PSCI_E_INVALID_PARAMS; result = PSCI_E_SUCCESS;
} }
return PSCI_E_SUCCESS; return result;
} }
static void zynqmp_get_sys_suspend_power_state(psci_power_state_t *req_state) static void zynqmp_get_sys_suspend_power_state(psci_power_state_t *req_state)

View file

@ -10,13 +10,12 @@
int32_t plat_core_pos_by_mpidr(u_register_t mpidr) int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
{ {
if ((mpidr & MPIDR_CLUSTER_MASK) != 0U) { int32_t core_pos = -1;
return -1;
if (((mpidr & MPIDR_CLUSTER_MASK) == 0U) &&
((mpidr & MPIDR_CPU_MASK) < PLATFORM_CORE_COUNT)) {
core_pos = (int32_t)zynqmp_calc_core_pos(mpidr);
} }
if ((mpidr & MPIDR_CPU_MASK) >= PLATFORM_CORE_COUNT) { return core_pos;
return -1;
}
return (int32_t)zynqmp_calc_core_pos(mpidr);
} }

View file

@ -2405,14 +2405,16 @@ static uint32_t pm_clk_invalid_list[] = {CLK_USB0, CLK_USB1, CLK_CSU_SPB,
static bool pm_clock_valid(uint32_t clock_id) static bool pm_clock_valid(uint32_t clock_id)
{ {
unsigned int i; unsigned int i;
bool valid = true;
for (i = 0U; i < ARRAY_SIZE(pm_clk_invalid_list); i++) { for (i = 0U; i < ARRAY_SIZE(pm_clk_invalid_list); i++) {
if (pm_clk_invalid_list[i] == clock_id) { if (pm_clk_invalid_list[i] == clock_id) {
return 0; valid = false;
break;
} }
} }
return 1; return valid;
} }
/** /**
@ -2494,13 +2496,15 @@ enum pm_ret_status pm_api_clock_get_topology(uint32_t clock_id,
uint8_t num_nodes; uint8_t num_nodes;
uint32_t i; uint32_t i;
uint16_t typeflags; uint16_t typeflags;
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if (!pm_clock_valid(clock_id)) { if (!pm_clock_valid(clock_id)) {
return PM_RET_ERROR_ARGS; goto exit_label;
} }
if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT) { if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT) {
return PM_RET_ERROR_NOTSUPPORTED; status = PM_RET_ERROR_NOTSUPPORTED;
goto exit_label;
} }
(void)memset(topology, 0, CLK_TOPOLOGY_PAYLOAD_LEN); (void)memset(topology, 0, CLK_TOPOLOGY_PAYLOAD_LEN);
@ -2509,7 +2513,8 @@ enum pm_ret_status pm_api_clock_get_topology(uint32_t clock_id,
/* Skip parent till index */ /* Skip parent till index */
if (index >= num_nodes) { if (index >= num_nodes) {
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
goto exit_label;
} }
for (i = 0; i < 3U; i++) { for (i = 0; i < 3U; i++) {
@ -2527,7 +2532,10 @@ enum pm_ret_status pm_api_clock_get_topology(uint32_t clock_id,
(CLK_TYPEFLAGS_BITS - CLK_TYPEFLAGS2_SHIFT)); (CLK_TYPEFLAGS_BITS - CLK_TYPEFLAGS2_SHIFT));
} }
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
exit_label:
return status;
} }
/** /**
@ -2550,13 +2558,15 @@ enum pm_ret_status pm_api_clock_get_fixedfactor_params(uint32_t clock_id,
const struct pm_clock_node *clock_nodes; const struct pm_clock_node *clock_nodes;
uint8_t num_nodes; uint8_t num_nodes;
uint32_t type, i; uint32_t type, i;
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if (!pm_clock_valid(clock_id)) { if (!pm_clock_valid(clock_id)) {
return PM_RET_ERROR_ARGS; goto exit_label;
} }
if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT) { if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT) {
return PM_RET_ERROR_NOTSUPPORTED; status = PM_RET_ERROR_NOTSUPPORTED;
goto exit_label;
} }
clock_nodes = *clocks[clock_id].nodes; clock_nodes = *clocks[clock_id].nodes;
@ -2572,11 +2582,12 @@ enum pm_ret_status pm_api_clock_get_fixedfactor_params(uint32_t clock_id,
} }
/* Clock is not fixed clock */ /* Clock is not fixed clock */
if (i == num_nodes) { if (i != num_nodes) {
return PM_RET_ERROR_ARGS; status = PM_RET_SUCCESS;
} }
return PM_RET_SUCCESS; exit_label:
return status;
} }
/** /**
@ -2603,18 +2614,20 @@ enum pm_ret_status pm_api_clock_get_parents(uint32_t clock_id,
{ {
uint32_t i; uint32_t i;
const int32_t *clk_parents; const int32_t *clk_parents;
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if (!pm_clock_valid(clock_id)) { if (!pm_clock_valid(clock_id)) {
return PM_RET_ERROR_ARGS; goto exit_label;
} }
if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT) { if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT) {
return PM_RET_ERROR_NOTSUPPORTED; status = PM_RET_ERROR_NOTSUPPORTED;
goto exit_label;
} }
clk_parents = *clocks[clock_id].parents; clk_parents = *clocks[clock_id].parents;
if (clk_parents == NULL) { if (clk_parents == NULL) {
return PM_RET_ERROR_ARGS; goto exit_label;
} }
(void)memset(parents, 0, CLK_PARENTS_PAYLOAD_LEN); (void)memset(parents, 0, CLK_PARENTS_PAYLOAD_LEN);
@ -2622,7 +2635,8 @@ enum pm_ret_status pm_api_clock_get_parents(uint32_t clock_id,
/* Skip parent till index */ /* Skip parent till index */
for (i = 0; i < index; i++) { for (i = 0; i < index; i++) {
if (clk_parents[i] == CLK_NA_PARENT) { if (clk_parents[i] == CLK_NA_PARENT) {
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
goto exit_label;
} }
} }
@ -2633,7 +2647,10 @@ enum pm_ret_status pm_api_clock_get_parents(uint32_t clock_id,
} }
} }
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
exit_label:
return status;
} }
/** /**
@ -2650,8 +2667,10 @@ enum pm_ret_status pm_api_clock_get_parents(uint32_t clock_id,
enum pm_ret_status pm_api_clock_get_attributes(uint32_t clock_id, enum pm_ret_status pm_api_clock_get_attributes(uint32_t clock_id,
uint32_t *attr) uint32_t *attr)
{ {
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if (clock_id >= (uint32_t)CLK_MAX) { if (clock_id >= (uint32_t)CLK_MAX) {
return PM_RET_ERROR_ARGS; goto exit_label;
} }
/* Clock valid bit */ /* Clock valid bit */
@ -2660,7 +2679,10 @@ enum pm_ret_status pm_api_clock_get_attributes(uint32_t clock_id,
/* Clock type (Output/External) */ /* Clock type (Output/External) */
*attr |= (pm_clock_type(clock_id) << CLK_TYPE_SHIFT); *attr |= (pm_clock_type(clock_id) << CLK_TYPE_SHIFT);
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
exit_label:
return status;
} }
/** /**
@ -2680,9 +2702,10 @@ enum pm_ret_status pm_api_clock_get_max_divisor(enum clock_id clock_id,
{ {
uint32_t i; uint32_t i;
const struct pm_clock_node *nodes; const struct pm_clock_node *nodes;
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if (clock_id >= CLK_MAX_OUTPUT_CLK) { if (clock_id >= CLK_MAX_OUTPUT_CLK) {
return PM_RET_ERROR_ARGS; goto exit_label;
} }
nodes = *clocks[clock_id].nodes; nodes = *clocks[clock_id].nodes;
@ -2695,11 +2718,13 @@ enum pm_ret_status pm_api_clock_get_max_divisor(enum clock_id clock_id,
} else { } else {
*max_div = (uint32_t)BIT(nodes[i].width) - (uint32_t)1U; *max_div = (uint32_t)BIT(nodes[i].width) - (uint32_t)1U;
} }
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
break;
} }
} }
return PM_RET_ERROR_ARGS; exit_label:
return status;
} }
/** /**
@ -2773,14 +2798,16 @@ static struct pm_pll pm_plls[] = {
struct pm_pll *pm_clock_get_pll(enum clock_id clock_id) struct pm_pll *pm_clock_get_pll(enum clock_id clock_id)
{ {
uint32_t i; uint32_t i;
struct pm_pll *pll = NULL;
for (i = 0; i < ARRAY_SIZE(pm_plls); i++) { for (i = 0; i < ARRAY_SIZE(pm_plls); i++) {
if (pm_plls[i].cid == clock_id) { if (pm_plls[i].cid == clock_id) {
return &pm_plls[i]; pll = &pm_plls[i];
break;
} }
} }
return NULL; return pll;
} }
/** /**
@ -2795,13 +2822,14 @@ enum pm_ret_status pm_clock_get_pll_node_id(enum clock_id clock_id,
enum pm_node_id *node_id) enum pm_node_id *node_id)
{ {
const struct pm_pll *pll = pm_clock_get_pll(clock_id); const struct pm_pll *pll = pm_clock_get_pll(clock_id);
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if (pll != NULL) { if (pll != NULL) {
*node_id = pll->nid; *node_id = pll->nid;
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
} }
return PM_RET_ERROR_ARGS; return status;
} }
/** /**
@ -2815,17 +2843,19 @@ enum pm_ret_status pm_clock_get_pll_node_id(enum clock_id clock_id,
struct pm_pll *pm_clock_get_pll_by_related_clk(enum clock_id clock_id) struct pm_pll *pm_clock_get_pll_by_related_clk(enum clock_id clock_id)
{ {
uint32_t i; uint32_t i;
struct pm_pll *pll = NULL;
for (i = 0; i < ARRAY_SIZE(pm_plls); i++) { for (i = 0; i < ARRAY_SIZE(pm_plls); i++) {
if ((pm_plls[i].pre_src == clock_id) || if ((pm_plls[i].pre_src == clock_id) ||
(pm_plls[i].post_src == clock_id) || (pm_plls[i].post_src == clock_id) ||
(pm_plls[i].div2 == clock_id) || (pm_plls[i].div2 == clock_id) ||
(pm_plls[i].bypass == clock_id)) { (pm_plls[i].bypass == clock_id)) {
return &pm_plls[i]; pll = &pm_plls[i];
break;
} }
} }
return NULL; return pll;
} }
/** /**
@ -2840,16 +2870,18 @@ struct pm_pll *pm_clock_get_pll_by_related_clk(enum clock_id clock_id)
*/ */
enum pm_ret_status pm_clock_pll_enable(struct pm_pll *pll) enum pm_ret_status pm_clock_pll_enable(struct pm_pll *pll)
{ {
if (pll == NULL) { enum pm_ret_status status = PM_RET_ERROR_ARGS;
return PM_RET_ERROR_ARGS;
if (pll != NULL) {
/* Set the PLL mode according to the buffered mode value */
if (pll->mode == PLL_FRAC_MODE) {
status = pm_pll_set_mode(pll->nid, PM_PLL_MODE_FRACTIONAL);
} else {
status = pm_pll_set_mode(pll->nid, PM_PLL_MODE_INTEGER);
}
} }
/* Set the PLL mode according to the buffered mode value */ return status;
if (pll->mode == PLL_FRAC_MODE) {
return pm_pll_set_mode(pll->nid, PM_PLL_MODE_FRACTIONAL);
}
return pm_pll_set_mode(pll->nid, PM_PLL_MODE_INTEGER);
} }
/** /**
@ -2864,11 +2896,13 @@ enum pm_ret_status pm_clock_pll_enable(struct pm_pll *pll)
*/ */
enum pm_ret_status pm_clock_pll_disable(struct pm_pll *pll) enum pm_ret_status pm_clock_pll_disable(struct pm_pll *pll)
{ {
if (pll == NULL) { enum pm_ret_status status = PM_RET_ERROR_ARGS;
return PM_RET_ERROR_ARGS;
if (pll != NULL) {
status = pm_pll_set_mode(pll->nid, PM_PLL_MODE_RESET);
} }
return pm_pll_set_mode(pll->nid, PM_PLL_MODE_RESET); return status;
} }
/** /**
@ -2885,16 +2919,16 @@ enum pm_ret_status pm_clock_pll_disable(struct pm_pll *pll)
enum pm_ret_status pm_clock_pll_get_state(struct pm_pll *pll, enum pm_ret_status pm_clock_pll_get_state(struct pm_pll *pll,
uint32_t *state) uint32_t *state)
{ {
enum pm_ret_status status; enum pm_ret_status status = PM_RET_ERROR_ARGS;
enum pm_pll_mode mode; enum pm_pll_mode mode;
if ((pll == NULL) || (state == NULL)) { if ((pll == NULL) || (state == NULL)) {
return PM_RET_ERROR_ARGS; goto exit_label;
} }
status = pm_pll_get_mode(pll->nid, &mode); status = pm_pll_get_mode(pll->nid, &mode);
if (status != PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; goto exit_label;
} }
if (mode == PM_PLL_MODE_RESET) { if (mode == PM_PLL_MODE_RESET) {
@ -2903,7 +2937,10 @@ enum pm_ret_status pm_clock_pll_get_state(struct pm_pll *pll,
*state = 1; *state = 1;
} }
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
exit_label:
return status;
} }
/** /**
@ -2923,23 +2960,25 @@ enum pm_ret_status pm_clock_pll_set_parent(struct pm_pll *pll,
enum clock_id clock_id, enum clock_id clock_id,
uint32_t parent_index) uint32_t parent_index)
{ {
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if (pll == NULL) { if (pll == NULL) {
return PM_RET_ERROR_ARGS; goto exit_label;
} }
if (pll->pre_src == clock_id) { if (pll->pre_src == clock_id) {
return pm_pll_set_parameter(pll->nid, PM_PLL_PARAM_PRE_SRC, status = pm_pll_set_parameter(pll->nid, PM_PLL_PARAM_PRE_SRC, parent_index);
parent_index); goto exit_label;
} }
if (pll->post_src == clock_id) { if (pll->post_src == clock_id) {
return pm_pll_set_parameter(pll->nid, PM_PLL_PARAM_POST_SRC, status = pm_pll_set_parameter(pll->nid, PM_PLL_PARAM_POST_SRC, parent_index);
parent_index); goto exit_label;
} }
if (pll->div2 == clock_id) { if (pll->div2 == clock_id) {
return pm_pll_set_parameter(pll->nid, PM_PLL_PARAM_DIV2, status = pm_pll_set_parameter(pll->nid, PM_PLL_PARAM_DIV2, parent_index);
parent_index);
} }
return PM_RET_ERROR_ARGS; exit_label:
return status;
} }
/** /**
@ -2957,27 +2996,33 @@ enum pm_ret_status pm_clock_pll_get_parent(struct pm_pll *pll,
enum clock_id clock_id, enum clock_id clock_id,
uint32_t *parent_index) uint32_t *parent_index)
{ {
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if (pll == NULL) { if (pll == NULL) {
return PM_RET_ERROR_ARGS; goto exit_label;
} }
if (pll->pre_src == clock_id) { if (pll->pre_src == clock_id) {
return pm_pll_get_parameter(pll->nid, PM_PLL_PARAM_PRE_SRC, status = pm_pll_get_parameter(pll->nid, PM_PLL_PARAM_PRE_SRC,
parent_index); parent_index);
goto exit_label;
} }
if (pll->post_src == clock_id) { if (pll->post_src == clock_id) {
return pm_pll_get_parameter(pll->nid, PM_PLL_PARAM_POST_SRC, status = pm_pll_get_parameter(pll->nid, PM_PLL_PARAM_POST_SRC,
parent_index); parent_index);
goto exit_label;
} }
if (pll->div2 == clock_id) { if (pll->div2 == clock_id) {
return pm_pll_get_parameter(pll->nid, PM_PLL_PARAM_DIV2, status = pm_pll_get_parameter(pll->nid, PM_PLL_PARAM_DIV2,
parent_index); parent_index);
goto exit_label;
} }
if (pll->bypass == clock_id) { if (pll->bypass == clock_id) {
*parent_index = 0; *parent_index = 0;
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
} }
return PM_RET_ERROR_ARGS; exit_label:
return status;
} }
/** /**
@ -2994,13 +3039,14 @@ enum pm_ret_status pm_clock_set_pll_mode(enum clock_id clock_id,
uint32_t mode) uint32_t mode)
{ {
struct pm_pll *pll = pm_clock_get_pll(clock_id); struct pm_pll *pll = pm_clock_get_pll(clock_id);
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if ((pll == NULL) || ((mode != PLL_FRAC_MODE) && (mode != PLL_INT_MODE))) { if (!((pll == NULL) || ((mode != PLL_FRAC_MODE) && (mode != PLL_INT_MODE)))) {
return PM_RET_ERROR_ARGS; pll->mode = (uint8_t)mode;
status = PM_RET_SUCCESS;
} }
pll->mode = (uint8_t)mode;
return PM_RET_SUCCESS; return status;
} }
/** /**
@ -3017,13 +3063,14 @@ enum pm_ret_status pm_clock_get_pll_mode(enum clock_id clock_id,
uint32_t *mode) uint32_t *mode)
{ {
const struct pm_pll *pll = pm_clock_get_pll(clock_id); const struct pm_pll *pll = pm_clock_get_pll(clock_id);
enum pm_ret_status status = PM_RET_ERROR_ARGS;
if ((pll == NULL) || (mode == NULL)) { if ((pll != NULL) && (mode != NULL)) {
return PM_RET_ERROR_ARGS; *mode = pll->mode;
status = PM_RET_SUCCESS;
} }
*mode = pll->mode;
return PM_RET_SUCCESS; return status;
} }
/** /**
@ -3035,15 +3082,17 @@ enum pm_ret_status pm_clock_get_pll_mode(enum clock_id clock_id,
*/ */
enum pm_ret_status pm_clock_id_is_valid(uint32_t clock_id) enum pm_ret_status pm_clock_id_is_valid(uint32_t clock_id)
{ {
if (!pm_clock_valid(clock_id)) { enum pm_ret_status status = PM_RET_ERROR_ARGS;
return PM_RET_ERROR_ARGS;
if (pm_clock_valid(clock_id)) {
if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT) {
status = PM_RET_ERROR_NOTSUPPORTED;
} else {
status = PM_RET_SUCCESS;
}
} }
if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT) { return status;
return PM_RET_ERROR_NOTSUPPORTED;
}
return PM_RET_SUCCESS;
} }
/** /**
@ -3058,25 +3107,29 @@ uint8_t pm_clock_has_div(uint32_t clock_id, enum pm_clock_div_id div_id)
{ {
uint32_t i; uint32_t i;
const struct pm_clock_node *nodes; const struct pm_clock_node *nodes;
uint8_t status = 0U;
if (clock_id >= (uint32_t)CLK_MAX_OUTPUT_CLK) { if (clock_id >= (uint32_t)CLK_MAX_OUTPUT_CLK) {
return 0; goto exit_label;
} }
nodes = *clocks[clock_id].nodes; nodes = *clocks[clock_id].nodes;
for (i = 0; i < clocks[clock_id].num_nodes; i++) { for (i = 0; i < clocks[clock_id].num_nodes; i++) {
if (nodes[i].type == TYPE_DIV1) { if (nodes[i].type == TYPE_DIV1) {
if (div_id == PM_CLOCK_DIV0_ID) { if (div_id == PM_CLOCK_DIV0_ID) {
return 1; status = 1U;
break;
} }
} else if (nodes[i].type == TYPE_DIV2) { } else if (nodes[i].type == TYPE_DIV2) {
if (div_id == PM_CLOCK_DIV1_ID) { if (div_id == PM_CLOCK_DIV1_ID) {
return 1; status = 1U;
break;
} }
} else { } else {
/* To fix the misra 15.7 warning */ /* To fix the misra 15.7 warning */
} }
} }
return 0; exit_label:
return status;
} }

View file

@ -61,9 +61,11 @@ static enum pm_ret_status pm_ioctl_get_rpu_oper_mode(uint32_t *mode)
static enum pm_ret_status pm_ioctl_set_rpu_oper_mode(uint32_t mode) static enum pm_ret_status pm_ioctl_set_rpu_oper_mode(uint32_t mode)
{ {
uint32_t val; uint32_t val;
enum pm_ret_status status = PM_RET_SUCCESS;
if ((mmio_read_32(CRL_APB_RST_LPD_TOP) & CRL_APB_RPU_AMBA_RESET) != 0U) { if ((mmio_read_32(CRL_APB_RST_LPD_TOP) & CRL_APB_RPU_AMBA_RESET) != 0U) {
return PM_RET_ERROR_ACCESS; status = PM_RET_ERROR_ACCESS;
goto exit_label;
} }
val = mmio_read_32(ZYNQMP_RPU_GLBL_CNTL); val = mmio_read_32(ZYNQMP_RPU_GLBL_CNTL);
@ -77,12 +79,14 @@ static enum pm_ret_status pm_ioctl_set_rpu_oper_mode(uint32_t mode)
val |= ZYNQMP_TCM_COMB_MASK; val |= ZYNQMP_TCM_COMB_MASK;
val |= ZYNQMP_SLCLAMP_MASK; val |= ZYNQMP_SLCLAMP_MASK;
} else { } else {
return PM_RET_ERROR_ARGS; status = PM_RET_ERROR_ARGS;
goto exit_label;
} }
mmio_write_32(ZYNQMP_RPU_GLBL_CNTL, val); mmio_write_32(ZYNQMP_RPU_GLBL_CNTL, val);
return PM_RET_SUCCESS; exit_label:
return status;
} }
/** /**
@ -136,6 +140,7 @@ static enum pm_ret_status pm_ioctl_config_boot_addr(enum pm_node_id nid,
static enum pm_ret_status pm_ioctl_config_tcm_comb(uint32_t value) static enum pm_ret_status pm_ioctl_config_tcm_comb(uint32_t value)
{ {
uint32_t val; uint32_t val;
enum pm_ret_status status = PM_RET_SUCCESS;
val = mmio_read_32(ZYNQMP_RPU_GLBL_CNTL); val = mmio_read_32(ZYNQMP_RPU_GLBL_CNTL);
@ -144,12 +149,14 @@ static enum pm_ret_status pm_ioctl_config_tcm_comb(uint32_t value)
} else if (value == PM_RPU_TCM_COMB) { } else if (value == PM_RPU_TCM_COMB) {
val |= ZYNQMP_TCM_COMB_MASK; val |= ZYNQMP_TCM_COMB_MASK;
} else { } else {
return PM_RET_ERROR_ARGS; status = PM_RET_ERROR_ARGS;
goto exit_label;
} }
mmio_write_32(ZYNQMP_RPU_GLBL_CNTL, val); mmio_write_32(ZYNQMP_RPU_GLBL_CNTL, val);
return PM_RET_SUCCESS; exit_label:
return status;
} }
/** /**
@ -165,12 +172,16 @@ static enum pm_ret_status pm_ioctl_config_tcm_comb(uint32_t value)
static enum pm_ret_status pm_ioctl_set_tapdelay_bypass(uint32_t type, static enum pm_ret_status pm_ioctl_set_tapdelay_bypass(uint32_t type,
uint32_t value) uint32_t value)
{ {
enum pm_ret_status status = PM_RET_SUCCESS;
if ((((value != PM_TAPDELAY_BYPASS_ENABLE) && if ((((value != PM_TAPDELAY_BYPASS_ENABLE) &&
(value != PM_TAPDELAY_BYPASS_DISABLE)) || (type >= PM_TAPDELAY_MAX))) { (value != PM_TAPDELAY_BYPASS_DISABLE)) || (type >= PM_TAPDELAY_MAX))) {
return PM_RET_ERROR_ARGS; status = PM_RET_ERROR_ARGS;
} else {
status = pm_mmio_write(IOU_TAPDLY_BYPASS, TAP_DELAY_MASK, value << type);
} }
return pm_mmio_write(IOU_TAPDLY_BYPASS, TAP_DELAY_MASK, value << type); return status;
} }
/** /**
@ -372,11 +383,11 @@ static enum pm_ret_status pm_ioctl_set_pll_frac_data
/* Get PLL node ID using PLL clock ID */ /* Get PLL node ID using PLL clock ID */
status = pm_clock_get_pll_node_id(pll, &pll_nid); status = pm_clock_get_pll_node_id(pll, &pll_nid);
if (status != PM_RET_SUCCESS) { if (status == PM_RET_SUCCESS) {
return status; status = pm_pll_set_parameter(pll_nid, PM_PLL_PARAM_DATA, data);
} }
return pm_pll_set_parameter(pll_nid, PM_PLL_PARAM_DATA, data); return status;
} }
/** /**
@ -397,11 +408,11 @@ static enum pm_ret_status pm_ioctl_get_pll_frac_data
/* Get PLL node ID using PLL clock ID */ /* Get PLL node ID using PLL clock ID */
status = pm_clock_get_pll_node_id(pll, &pll_nid); status = pm_clock_get_pll_node_id(pll, &pll_nid);
if (status != PM_RET_SUCCESS) { if (status == PM_RET_SUCCESS) {
return status; status = pm_pll_get_parameter(pll_nid, PM_PLL_PARAM_DATA, data);
} }
return pm_pll_get_parameter(pll_nid, PM_PLL_PARAM_DATA, data); return status;
} }
/** /**
@ -418,12 +429,16 @@ static enum pm_ret_status pm_ioctl_get_pll_frac_data
static enum pm_ret_status pm_ioctl_write_ggs(uint32_t index, static enum pm_ret_status pm_ioctl_write_ggs(uint32_t index,
uint32_t value) uint32_t value)
{ {
enum pm_ret_status ret_status = PM_RET_SUCCESS;
if (index >= GGS_NUM_REGS) { if (index >= GGS_NUM_REGS) {
return PM_RET_ERROR_ARGS; ret_status = PM_RET_ERROR_ARGS;
} else {
ret_status = pm_mmio_write((uint64_t)GGS_BASEADDR + (index << 2),
0xFFFFFFFFU, value);
} }
return pm_mmio_write((uint64_t)(GGS_BASEADDR + (index << 2)), return ret_status;
0xFFFFFFFFU, value);
} }
/** /**
@ -440,11 +455,15 @@ static enum pm_ret_status pm_ioctl_write_ggs(uint32_t index,
static enum pm_ret_status pm_ioctl_read_ggs(uint32_t index, static enum pm_ret_status pm_ioctl_read_ggs(uint32_t index,
uint32_t *value) uint32_t *value)
{ {
enum pm_ret_status ret_status = PM_RET_SUCCESS;
if (index >= GGS_NUM_REGS) { if (index >= GGS_NUM_REGS) {
return PM_RET_ERROR_ARGS; ret_status = PM_RET_ERROR_ARGS;
} else {
ret_status = pm_mmio_read((uint64_t)GGS_BASEADDR + (index << 2), value);
} }
return pm_mmio_read((uint64_t)(GGS_BASEADDR + (index << 2)), value); return ret_status;
} }
/** /**
@ -461,12 +480,16 @@ static enum pm_ret_status pm_ioctl_read_ggs(uint32_t index,
static enum pm_ret_status pm_ioctl_write_pggs(uint32_t index, static enum pm_ret_status pm_ioctl_write_pggs(uint32_t index,
uint32_t value) uint32_t value)
{ {
enum pm_ret_status ret_status = PM_RET_SUCCESS;
if (index >= PGGS_NUM_REGS) { if (index >= PGGS_NUM_REGS) {
return PM_RET_ERROR_ARGS; ret_status = PM_RET_ERROR_ARGS;
} else {
ret_status = pm_mmio_write((uint64_t)PGGS_BASEADDR + (index << 2),
0xFFFFFFFFU, value);
} }
return pm_mmio_write((uint64_t)(PGGS_BASEADDR + (index << 2)), return ret_status;
0xFFFFFFFFU, value);
} }
/** /**
@ -481,6 +504,7 @@ static enum pm_ret_status pm_ioctl_afi(uint32_t index,
uint32_t value) uint32_t value)
{ {
uint32_t mask; uint32_t mask;
enum pm_ret_status status = PM_RET_ERROR_ARGS;
const uint32_t regarr[] = {0xFD360000U, const uint32_t regarr[] = {0xFD360000U,
0xFD360014U, 0xFD360014U,
0xFD370000U, 0xFD370000U,
@ -499,17 +523,16 @@ static enum pm_ret_status pm_ioctl_afi(uint32_t index,
0xFF419000U, 0xFF419000U,
}; };
if (index >= ARRAY_SIZE(regarr)) { if (index < ARRAY_SIZE(regarr)) {
return PM_RET_ERROR_ARGS; if (index <= AFIFM6_WRCTRL) {
mask = FABRIC_WIDTH;
} else {
mask = 0xf00;
}
status = pm_mmio_write(regarr[index], mask, value);
} }
if (index <= AFIFM6_WRCTRL) { return status;
mask = FABRIC_WIDTH;
} else {
mask = 0xf00;
}
return pm_mmio_write(regarr[index], mask, value);
} }
/** /**
@ -526,11 +549,15 @@ static enum pm_ret_status pm_ioctl_afi(uint32_t index,
static enum pm_ret_status pm_ioctl_read_pggs(uint32_t index, static enum pm_ret_status pm_ioctl_read_pggs(uint32_t index,
uint32_t *value) uint32_t *value)
{ {
enum pm_ret_status status = 0;
if (index >= PGGS_NUM_REGS) { if (index >= PGGS_NUM_REGS) {
return PM_RET_ERROR_ARGS; status = PM_RET_ERROR_ARGS;
} else {
status = pm_mmio_read((uint64_t)PGGS_BASEADDR + (index << 2), value);
} }
return pm_mmio_read((uint64_t)(PGGS_BASEADDR + (index << 2)), value); return status;
} }
/** /**
@ -548,7 +575,7 @@ static enum pm_ret_status pm_ioctl_ulpi_reset(void)
ret = pm_mmio_write(CRL_APB_BOOT_PIN_CTRL, CRL_APB_BOOT_PIN_MASK, ret = pm_mmio_write(CRL_APB_BOOT_PIN_CTRL, CRL_APB_BOOT_PIN_MASK,
ZYNQMP_ULPI_RESET_VAL_HIGH); ZYNQMP_ULPI_RESET_VAL_HIGH);
if (ret != PM_RET_SUCCESS) { if (ret != PM_RET_SUCCESS) {
return ret; goto exit_label;
} }
/* Drive ULPI assert for atleast 1ms */ /* Drive ULPI assert for atleast 1ms */
@ -557,7 +584,7 @@ static enum pm_ret_status pm_ioctl_ulpi_reset(void)
ret = pm_mmio_write(CRL_APB_BOOT_PIN_CTRL, CRL_APB_BOOT_PIN_MASK, ret = pm_mmio_write(CRL_APB_BOOT_PIN_CTRL, CRL_APB_BOOT_PIN_MASK,
ZYNQMP_ULPI_RESET_VAL_LOW); ZYNQMP_ULPI_RESET_VAL_LOW);
if (ret != PM_RET_SUCCESS) { if (ret != PM_RET_SUCCESS) {
return ret; goto exit_label;
} }
/* Drive ULPI de-assert for atleast 1ms */ /* Drive ULPI de-assert for atleast 1ms */
@ -566,6 +593,7 @@ static enum pm_ret_status pm_ioctl_ulpi_reset(void)
ret = pm_mmio_write(CRL_APB_BOOT_PIN_CTRL, CRL_APB_BOOT_PIN_MASK, ret = pm_mmio_write(CRL_APB_BOOT_PIN_CTRL, CRL_APB_BOOT_PIN_MASK,
ZYNQMP_ULPI_RESET_VAL_HIGH); ZYNQMP_ULPI_RESET_VAL_HIGH);
exit_label:
return ret; return ret;
} }
@ -703,12 +731,13 @@ enum pm_ret_status tfa_ioctl_bitmask(uint32_t *bit_mask)
IOCTL_AFI, IOCTL_AFI,
}; };
uint8_t i, ioctl_id; uint8_t i, ioctl_id;
enum pm_ret_status ret; enum pm_ret_status ret = PM_RET_SUCCESS;
for (i = 0U; i < ARRAY_SIZE(supported_ids); i++) { for (i = 0U; i < ARRAY_SIZE(supported_ids); i++) {
ioctl_id = supported_ids[i]; ioctl_id = supported_ids[i];
if (ioctl_id >= 64U) { if (ioctl_id >= 64U) {
return PM_RET_ERROR_NOTSUPPORTED; ret = PM_RET_ERROR_NOTSUPPORTED;
break;
} }
ret = check_api_dependency(ioctl_id); ret = check_api_dependency(ioctl_id);
if (ret == PM_RET_SUCCESS) { if (ret == PM_RET_SUCCESS) {
@ -716,5 +745,5 @@ enum pm_ret_status tfa_ioctl_bitmask(uint32_t *bit_mask)
} }
} }
return PM_RET_SUCCESS; return ret;
} }

View file

@ -1991,13 +1991,16 @@ enum pm_ret_status pm_api_pinctrl_get_num_functions(uint32_t *nfuncs)
enum pm_ret_status pm_api_pinctrl_get_num_func_groups(uint32_t fid, enum pm_ret_status pm_api_pinctrl_get_num_func_groups(uint32_t fid,
uint32_t *ngroups) uint32_t *ngroups)
{ {
enum pm_ret_status status = PM_RET_SUCCESS;
if (fid >= (uint32_t)MAX_FUNCTION) { if (fid >= (uint32_t)MAX_FUNCTION) {
return PM_RET_ERROR_ARGS; status = PM_RET_ERROR_ARGS;
} else {
*ngroups = pinctrl_functions[fid].group_size;
} }
*ngroups = pinctrl_functions[fid].group_size; return status;
return PM_RET_SUCCESS;
} }
/** /**
@ -2044,9 +2047,11 @@ enum pm_ret_status pm_api_pinctrl_get_function_groups(uint32_t fid,
uint16_t grps; uint16_t grps;
uint16_t end_of_grp_offset; uint16_t end_of_grp_offset;
uint16_t i; uint16_t i;
enum pm_ret_status status = PM_RET_SUCCESS;
if (fid >= (uint32_t)MAX_FUNCTION) { if (fid >= (uint32_t)MAX_FUNCTION) {
return PM_RET_ERROR_ARGS; status = PM_RET_ERROR_ARGS;
goto exit_label;
} }
(void)memset(groups, END_OF_GROUPS, GROUPS_PAYLOAD_LEN); (void)memset(groups, END_OF_GROUPS, GROUPS_PAYLOAD_LEN);
@ -2061,7 +2066,8 @@ enum pm_ret_status pm_api_pinctrl_get_function_groups(uint32_t fid,
groups[i] = (uint16_t)(grps + index + i); groups[i] = (uint16_t)(grps + index + i);
} }
return PM_RET_SUCCESS; exit_label:
return status;
} }
/** /**
@ -2089,22 +2095,26 @@ enum pm_ret_status pm_api_pinctrl_get_pin_groups(uint32_t pin,
{ {
uint32_t i; uint32_t i;
const uint16_t *grps; const uint16_t *grps;
enum pm_ret_status status = PM_RET_SUCCESS;
if (pin >= (uint32_t)MAX_PIN) { if (pin >= (uint32_t)MAX_PIN) {
return PM_RET_ERROR_ARGS; status = PM_RET_ERROR_ARGS;
goto exit_label;
} }
(void)memset(groups, END_OF_GROUPS, GROUPS_PAYLOAD_LEN); (void)memset(groups, END_OF_GROUPS, GROUPS_PAYLOAD_LEN);
grps = *zynqmp_pin_groups[pin].groups; grps = *zynqmp_pin_groups[pin].groups;
if (grps == NULL) { if (grps == NULL) {
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
goto exit_label;
} }
/* Skip groups till index */ /* Skip groups till index */
for (i = 0; i < index; i++) { for (i = 0; i < index; i++) {
if (grps[i] == (uint16_t)END_OF_GROUPS) { if (grps[i] == (uint16_t)END_OF_GROUPS) {
return PM_RET_SUCCESS; status = PM_RET_SUCCESS;
goto exit_label;
} }
} }
@ -2115,5 +2125,6 @@ enum pm_ret_status pm_api_pinctrl_get_pin_groups(uint32_t pin,
} }
} }
return PM_RET_SUCCESS; exit_label:
return status;
} }

View file

@ -238,11 +238,13 @@ static void pm_client_set_wakeup_sources(void)
*/ */
const struct pm_proc *pm_get_proc(uint32_t cpuid) const struct pm_proc *pm_get_proc(uint32_t cpuid)
{ {
const struct pm_proc *ret = NULL;
if (cpuid < ARRAY_SIZE(pm_procs_all)) { if (cpuid < ARRAY_SIZE(pm_procs_all)) {
return &pm_procs_all[cpuid]; ret = &pm_procs_all[cpuid];
} }
return NULL; return ret;
} }
/** /**
@ -254,12 +256,16 @@ const struct pm_proc *pm_get_proc(uint32_t cpuid)
*/ */
static uint32_t pm_get_cpuid(enum pm_node_id nid) static uint32_t pm_get_cpuid(enum pm_node_id nid)
{ {
uint32_t ret = UNDEFINED_CPUID;
for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) { for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) {
if (pm_procs_all[i].node_id == nid) { if (pm_procs_all[i].node_id == nid) {
return i; ret = i;
break;
} }
} }
return UNDEFINED_CPUID;
return ret;
} }
const struct pm_proc *primary_proc = &pm_procs_all[0]; const struct pm_proc *primary_proc = &pm_procs_all[0];
@ -321,28 +327,30 @@ void pm_client_abort_suspend(void)
void pm_client_wakeup(const struct pm_proc *proc) void pm_client_wakeup(const struct pm_proc *proc)
{ {
uint32_t cpuid = pm_get_cpuid(proc->node_id); uint32_t cpuid = pm_get_cpuid(proc->node_id);
uint32_t val;
if (cpuid == UNDEFINED_CPUID) { if (cpuid != UNDEFINED_CPUID) {
return; bakery_lock_get(&pm_client_secure_lock);
/* clear powerdown bit for affected cpu */
val = mmio_read_32(APU_PWRCTL);
val &= ~(proc->pwrdn_mask);
mmio_write_32(APU_PWRCTL, val);
bakery_lock_release(&pm_client_secure_lock);
} }
bakery_lock_get(&pm_client_secure_lock);
/* clear powerdown bit for affected cpu */
uint32_t val = mmio_read_32(APU_PWRCTL);
val &= ~(proc->pwrdn_mask);
mmio_write_32(APU_PWRCTL, val);
bakery_lock_release(&pm_client_secure_lock);
} }
enum pm_ret_status pm_set_suspend_mode(uint32_t mode) enum pm_ret_status pm_set_suspend_mode(uint32_t mode)
{ {
if ((mode != PM_SUSPEND_MODE_STD) && enum pm_ret_status suspend_mode_status = PM_RET_ERROR_ARGS;
(mode != PM_SUSPEND_MODE_POWER_OFF)) {
return PM_RET_ERROR_ARGS; if ((mode == PM_SUSPEND_MODE_STD) ||
(mode == PM_SUSPEND_MODE_POWER_OFF)) {
suspend_mode = mode;
suspend_mode_status = PM_RET_SUCCESS;
} }
suspend_mode = mode; return suspend_mode_status;
return PM_RET_SUCCESS;
} }

View file

@ -305,14 +305,17 @@ enum pm_ret_status pm_req_suspend(enum pm_node_id target,
uint32_t latency, uint32_t state) uint32_t latency, uint32_t state)
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status ret = PM_RET_SUCCESS;
/* Send request to the PMU */ /* Send request to the PMU */
PM_PACK_PAYLOAD5(payload, PM_REQ_SUSPEND, target, ack, latency, state); PM_PACK_PAYLOAD5(payload, PM_REQ_SUSPEND, target, ack, latency, state);
if (ack == REQ_ACK_BLOCKING) { if (ack == REQ_ACK_BLOCKING) {
return pm_ipi_send_sync(primary_proc, payload, NULL, 0); ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
} else { } else {
return pm_ipi_send(primary_proc, payload); ret = pm_ipi_send(primary_proc, payload);
} }
return ret;
} }
/** /**
@ -339,7 +342,7 @@ enum pm_ret_status pm_req_wakeup(enum pm_node_id target,
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
uint64_t encoded_address; uint64_t encoded_address;
enum pm_ret_status ret = PM_RET_SUCCESS;
/* encode set Address into 1st bit of address */ /* encode set Address into 1st bit of address */
encoded_address = address; encoded_address = address;
@ -350,10 +353,12 @@ enum pm_ret_status pm_req_wakeup(enum pm_node_id target,
encoded_address >> 32, ack); encoded_address >> 32, ack);
if (ack == REQ_ACK_BLOCKING) { if (ack == REQ_ACK_BLOCKING) {
return pm_ipi_send_sync(primary_proc, payload, NULL, 0); ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
} else { } else {
return pm_ipi_send(primary_proc, payload); ret = pm_ipi_send(primary_proc, payload);
} }
return ret;
} }
/** /**
@ -369,15 +374,18 @@ enum pm_ret_status pm_force_powerdown(enum pm_node_id target,
enum pm_request_ack ack) enum pm_request_ack ack)
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status ret = PM_RET_SUCCESS;
/* Send request to the PMU */ /* Send request to the PMU */
PM_PACK_PAYLOAD3(payload, PM_FORCE_POWERDOWN, target, ack); PM_PACK_PAYLOAD3(payload, PM_FORCE_POWERDOWN, target, ack);
if (ack == REQ_ACK_BLOCKING) { if (ack == REQ_ACK_BLOCKING) {
return pm_ipi_send_sync(primary_proc, payload, NULL, 0); ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
} else { } else {
return pm_ipi_send(primary_proc, payload); ret = pm_ipi_send(primary_proc, payload);
} }
return ret;
} }
/** /**
@ -439,15 +447,17 @@ enum pm_ret_status pm_set_wakeup_source(enum pm_node_id target,
enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype) enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype)
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status ret = PM_RET_SUCCESS;
if (type == (uint32_t)PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY) { if (type == (uint32_t)PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY) {
/* Setting scope for subsequent PSCI reboot or shutdown */ /* Setting scope for subsequent PSCI reboot or shutdown */
pm_shutdown_scope = subtype; pm_shutdown_scope = subtype;
return PM_RET_SUCCESS; } else {
PM_PACK_PAYLOAD3(payload, PM_SYSTEM_SHUTDOWN, type, subtype);
ret = pm_ipi_send_non_blocking(primary_proc, payload);
} }
PM_PACK_PAYLOAD3(payload, PM_SYSTEM_SHUTDOWN, type, subtype); return ret;
return pm_ipi_send_non_blocking(primary_proc, payload);
} }
/* APIs for managing PM slaves: */ /* APIs for managing PM slaves: */
@ -468,14 +478,17 @@ enum pm_ret_status pm_req_node(enum pm_node_id nid,
enum pm_request_ack ack) enum pm_request_ack ack)
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status ret = PM_RET_SUCCESS;
PM_PACK_PAYLOAD5(payload, PM_REQ_NODE, nid, capabilities, qos, ack); PM_PACK_PAYLOAD5(payload, PM_REQ_NODE, nid, capabilities, qos, ack);
if (ack == REQ_ACK_BLOCKING) { if (ack == REQ_ACK_BLOCKING) {
return pm_ipi_send_sync(primary_proc, payload, NULL, 0); ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
} else { } else {
return pm_ipi_send(primary_proc, payload); ret = pm_ipi_send(primary_proc, payload);
} }
return ret;
} }
/** /**
@ -496,15 +509,18 @@ enum pm_ret_status pm_set_requirement(enum pm_node_id nid,
enum pm_request_ack ack) enum pm_request_ack ack)
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status ret = PM_RET_SUCCESS;
PM_PACK_PAYLOAD5(payload, PM_SET_REQUIREMENT, nid, capabilities, qos, PM_PACK_PAYLOAD5(payload, PM_SET_REQUIREMENT, nid, capabilities, qos,
ack); ack);
if (ack == REQ_ACK_BLOCKING) { if (ack == REQ_ACK_BLOCKING) {
return pm_ipi_send_sync(primary_proc, payload, NULL, 0); ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
} else { } else {
return pm_ipi_send(primary_proc, payload); ret = pm_ipi_send(primary_proc, payload);
} }
return ret;
} }
/* Miscellaneous API functions */ /* Miscellaneous API functions */
@ -709,13 +725,16 @@ enum pm_ret_status pm_aes_engine(uint32_t address_high,
enum pm_ret_status pm_get_callbackdata(uint32_t *data, size_t count) enum pm_ret_status pm_get_callbackdata(uint32_t *data, size_t count)
{ {
enum pm_ret_status ret = PM_RET_SUCCESS; enum pm_ret_status ret = PM_RET_SUCCESS;
/* Return if interrupt is not from PMU */ /* Return if interrupt is not from PMU */
if ((pm_ipi_irq_status(primary_proc) == 0U)) { if ((pm_ipi_irq_status(primary_proc) == 0U)) {
return ret; goto exit_label;
} }
ret = pm_ipi_buff_read_callb(data, count); ret = pm_ipi_buff_read_callb(data, count);
pm_ipi_irq_clear(primary_proc); pm_ipi_irq_clear(primary_proc);
exit_label:
return ret; return ret;
} }
@ -770,7 +789,7 @@ enum pm_ret_status check_api_dependency(uint8_t id)
{ {
uint8_t i; uint8_t i;
uint32_t version_type; uint32_t version_type;
enum pm_ret_status ret; enum pm_ret_status ret = PM_RET_SUCCESS;
for (i = 0U; i < ARRAY_SIZE(api_dep_table); i++) { for (i = 0U; i < ARRAY_SIZE(api_dep_table); i++) {
if (api_dep_table[i].id == id) { if (api_dep_table[i].id == id) {
@ -780,18 +799,20 @@ enum pm_ret_status check_api_dependency(uint8_t id)
ret = fw_api_version(api_dep_table[i].api_id, ret = fw_api_version(api_dep_table[i].api_id,
&version_type, 1); &version_type, 1);
if (ret != (uint32_t)PM_RET_SUCCESS) { if (ret != PM_RET_SUCCESS) {
return ret; goto exit_label;
} }
/* Check if fw version matches TF-A expected version */ /* Check if fw version matches TF-A expected version */
if (version_type != tfa_expected_ver_id[api_dep_table[i].api_id]) { if (version_type != tfa_expected_ver_id[api_dep_table[i].api_id]) {
return PM_RET_ERROR_NOTSUPPORTED; ret = PM_RET_ERROR_NOTSUPPORTED;
goto exit_label;
} }
} }
} }
return PM_RET_SUCCESS; exit_label:
return ret;
} }
/** /**
@ -806,20 +827,26 @@ enum pm_ret_status check_api_dependency(uint8_t id)
static enum pm_ret_status feature_check_tfa(uint32_t api_id, uint32_t *version, static enum pm_ret_status feature_check_tfa(uint32_t api_id, uint32_t *version,
uint32_t *bit_mask) uint32_t *bit_mask)
{ {
enum pm_ret_status ret = PM_RET_ERROR_NO_FEATURE;
switch (api_id) { switch (api_id) {
case PM_QUERY_DATA: case PM_QUERY_DATA:
*version = TFA_API_QUERY_DATA_VERSION; *version = TFA_API_QUERY_DATA_VERSION;
bit_mask[0] = (uint32_t)(PM_QUERY_FEATURE_BITMASK); bit_mask[0] = (uint32_t)(PM_QUERY_FEATURE_BITMASK);
bit_mask[1] = (uint32_t)(PM_QUERY_FEATURE_BITMASK >> 32); bit_mask[1] = (uint32_t)(PM_QUERY_FEATURE_BITMASK >> 32);
return PM_RET_SUCCESS; ret = PM_RET_SUCCESS;
break;
case PM_GET_CALLBACK_DATA: case PM_GET_CALLBACK_DATA:
case PM_GET_TRUSTZONE_VERSION: case PM_GET_TRUSTZONE_VERSION:
case PM_SET_SUSPEND_MODE: case PM_SET_SUSPEND_MODE:
*version = TFA_API_BASE_VERSION; *version = TFA_API_BASE_VERSION;
return PM_RET_SUCCESS; ret = PM_RET_SUCCESS;
break;
default: default:
return PM_RET_ERROR_NO_FEATURE; break;
} }
return ret;
} }
/** /**
@ -834,6 +861,8 @@ static enum pm_ret_status feature_check_tfa(uint32_t api_id, uint32_t *version,
static enum pm_ret_status get_tfa_version_for_partial_apis(uint32_t api_id, static enum pm_ret_status get_tfa_version_for_partial_apis(uint32_t api_id,
uint32_t *version) uint32_t *version)
{ {
enum pm_ret_status ret = PM_RET_ERROR_ARGS;
switch (api_id) { switch (api_id) {
case PM_SELF_SUSPEND: case PM_SELF_SUSPEND:
case PM_REQ_WAKEUP: case PM_REQ_WAKEUP:
@ -854,13 +883,17 @@ static enum pm_ret_status get_tfa_version_for_partial_apis(uint32_t api_id,
case PM_PLL_GET_MODE: case PM_PLL_GET_MODE:
case PM_REGISTER_ACCESS: case PM_REGISTER_ACCESS:
*version = TFA_API_BASE_VERSION; *version = TFA_API_BASE_VERSION;
return PM_RET_SUCCESS; ret = PM_RET_SUCCESS;
break;
case PM_FEATURE_CHECK: case PM_FEATURE_CHECK:
*version = FW_API_VERSION_2; *version = FW_API_VERSION_2;
return PM_RET_SUCCESS; ret = PM_RET_SUCCESS;
break;
default: default:
return PM_RET_ERROR_ARGS; break;
} }
return ret;
} }
/** /**
@ -876,6 +909,7 @@ static enum pm_ret_status feature_check_partial(uint32_t api_id,
uint32_t *version) uint32_t *version)
{ {
uint32_t status; uint32_t status;
uint32_t ret = PM_RET_ERROR_NO_FEATURE;
switch (api_id) { switch (api_id) {
case PM_SELF_SUSPEND: case PM_SELF_SUSPEND:
@ -898,13 +932,17 @@ static enum pm_ret_status feature_check_partial(uint32_t api_id,
case PM_REGISTER_ACCESS: case PM_REGISTER_ACCESS:
case PM_FEATURE_CHECK: case PM_FEATURE_CHECK:
status = check_api_dependency(api_id); status = check_api_dependency(api_id);
if (status != (uint32_t)PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; ret = status;
} else {
ret = get_tfa_version_for_partial_apis(api_id, version);
} }
return get_tfa_version_for_partial_apis(api_id, version); break;
default: default:
return PM_RET_ERROR_NO_FEATURE; break;
} }
return ret;
} }
/** /**
@ -921,18 +959,18 @@ enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *version,
uint32_t *bit_mask, uint8_t len) uint32_t *bit_mask, uint8_t len)
{ {
uint32_t ret_payload[RET_PAYLOAD_ARG_CNT] = {0U}; uint32_t ret_payload[RET_PAYLOAD_ARG_CNT] = {0U};
uint32_t status; enum pm_ret_status status;
/* Get API version implemented in TF-A */ /* Get API version implemented in TF-A */
status = feature_check_tfa(api_id, version, bit_mask); status = feature_check_tfa(api_id, version, bit_mask);
if (status != (uint32_t)PM_RET_ERROR_NO_FEATURE) { if (status != PM_RET_ERROR_NO_FEATURE) {
return status; goto exit_label;
} }
/* Get API version implemented by firmware and TF-A both */ /* Get API version implemented by firmware and TF-A both */
status = feature_check_partial(api_id, version); status = feature_check_partial(api_id, version);
if (status != (uint32_t)PM_RET_ERROR_NO_FEATURE) { if (status != PM_RET_ERROR_NO_FEATURE) {
return status; goto exit_label;
} }
/* Get API version implemented by firmware */ /* Get API version implemented by firmware */
@ -941,7 +979,7 @@ enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *version,
* firmware but implemented in TF-A * firmware but implemented in TF-A
*/ */
if ((api_id != (uint32_t)PM_IOCTL) && (status != PM_RET_SUCCESS)) { if ((api_id != (uint32_t)PM_IOCTL) && (status != PM_RET_SUCCESS)) {
return status; goto exit_label;
} }
*version = ret_payload[0]; *version = ret_payload[0];
@ -949,7 +987,8 @@ enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *version,
/* Update IOCTL bit mask which are implemented in TF-A */ /* Update IOCTL bit mask which are implemented in TF-A */
if ((api_id == (uint32_t)PM_IOCTL) || (api_id == (uint32_t)PM_GET_OP_CHARACTERISTIC)) { if ((api_id == (uint32_t)PM_IOCTL) || (api_id == (uint32_t)PM_GET_OP_CHARACTERISTIC)) {
if (len < 2U) { if (len < 2U) {
return PM_RET_ERROR_ARGS; status = PM_RET_ERROR_ARGS;
goto exit_label;
} }
bit_mask[0] = ret_payload[1]; bit_mask[0] = ret_payload[1];
bit_mask[1] = ret_payload[2]; bit_mask[1] = ret_payload[2];
@ -961,6 +1000,7 @@ enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *version,
/* Requires for MISRA */ /* Requires for MISRA */
} }
exit_label:
return status; return status;
} }
@ -1112,7 +1152,7 @@ static enum pm_ret_status pm_clock_gate(uint32_t clock_id,
/* Check if clock ID is valid and return an error if it is not */ /* Check if clock ID is valid and return an error if it is not */
status = pm_clock_id_is_valid(clock_id); status = pm_clock_id_is_valid(clock_id);
if (status != PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; goto exit_label;
} }
if (enable != 0U) { if (enable != 0U) {
@ -1130,6 +1170,7 @@ static enum pm_ret_status pm_clock_gate(uint32_t clock_id,
status = PM_RET_SUCCESS; status = PM_RET_SUCCESS;
} }
exit_label:
return status; return status;
} }
@ -1147,15 +1188,19 @@ static enum pm_ret_status pm_clock_gate(uint32_t clock_id,
enum pm_ret_status pm_clock_enable(uint32_t clock_id) enum pm_ret_status pm_clock_enable(uint32_t clock_id)
{ {
struct pm_pll *pll; struct pm_pll *pll;
enum pm_ret_status ret = PM_RET_SUCCESS;
/* First try to handle it as a PLL */ /* First try to handle it as a PLL */
pll = pm_clock_get_pll(clock_id); pll = pm_clock_get_pll(clock_id);
if (pll != NULL) { if (pll != NULL) {
return pm_clock_pll_enable(pll); ret = pm_clock_pll_enable(pll);
} else {
/* It's an on-chip clock, PMU should configure clock's gate */
ret = pm_clock_gate(clock_id, 1);
} }
/* It's an on-chip clock, PMU should configure clock's gate */ return ret;
return pm_clock_gate(clock_id, 1);
} }
/** /**
@ -1172,15 +1217,19 @@ enum pm_ret_status pm_clock_enable(uint32_t clock_id)
enum pm_ret_status pm_clock_disable(uint32_t clock_id) enum pm_ret_status pm_clock_disable(uint32_t clock_id)
{ {
struct pm_pll *pll; struct pm_pll *pll;
enum pm_ret_status ret = PM_RET_SUCCESS;
/* First try to handle it as a PLL */ /* First try to handle it as a PLL */
pll = pm_clock_get_pll(clock_id); pll = pm_clock_get_pll(clock_id);
if (pll != NULL) { if (pll != NULL) {
return pm_clock_pll_disable(pll); ret = pm_clock_pll_disable(pll);
} else {
/* It's an on-chip clock, PMU should configure clock's gate */
ret = pm_clock_gate(clock_id, 0);
} }
/* It's an on-chip clock, PMU should configure clock's gate */ return ret;
return pm_clock_gate(clock_id, 0);
} }
/** /**
@ -1204,17 +1253,21 @@ enum pm_ret_status pm_clock_getstate(uint32_t clock_id,
/* First try to handle it as a PLL */ /* First try to handle it as a PLL */
pll = pm_clock_get_pll(clock_id); pll = pm_clock_get_pll(clock_id);
if (pll != NULL) { if (pll != NULL) {
return pm_clock_pll_get_state(pll, state); status = pm_clock_pll_get_state(pll, state);
goto exit_label;
} }
/* Check if clock ID is a valid on-chip clock */ /* Check if clock ID is a valid on-chip clock */
status = pm_clock_id_is_valid(clock_id); status = pm_clock_id_is_valid(clock_id);
if (status != PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; goto exit_label;
} }
/* Send request to the PMU */ /* Send request to the PMU */
PM_PACK_PAYLOAD2(payload, PM_CLOCK_GETSTATE, clock_id); PM_PACK_PAYLOAD2(payload, PM_CLOCK_GETSTATE, clock_id);
return pm_ipi_send_sync(primary_proc, payload, state, 1); status = pm_ipi_send_sync(primary_proc, payload, state, 1);
exit_label:
return status;
} }
/** /**
@ -1242,13 +1295,14 @@ enum pm_ret_status pm_clock_setdivider(uint32_t clock_id,
/* Get PLL node ID using PLL clock ID */ /* Get PLL node ID using PLL clock ID */
status = pm_clock_get_pll_node_id(clock_id, &nid); status = pm_clock_get_pll_node_id(clock_id, &nid);
if (status == PM_RET_SUCCESS) { if (status == PM_RET_SUCCESS) {
return pm_pll_set_parameter(nid, PM_PLL_PARAM_FBDIV, divider); status = pm_pll_set_parameter(nid, PM_PLL_PARAM_FBDIV, divider);
goto exit_label;
} }
/* Check if clock ID is a valid on-chip clock */ /* Check if clock ID is a valid on-chip clock */
status = pm_clock_id_is_valid(clock_id); status = pm_clock_id_is_valid(clock_id);
if (status != PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; goto exit_label;
} }
if (div0 == (divider & div0)) { if (div0 == (divider & div0)) {
@ -1258,12 +1312,16 @@ enum pm_ret_status pm_clock_setdivider(uint32_t clock_id,
div_id = PM_CLOCK_DIV1_ID; div_id = PM_CLOCK_DIV1_ID;
val = (divider & ~div1) >> 16; val = (divider & ~div1) >> 16;
} else { } else {
return PM_RET_ERROR_ARGS; status = PM_RET_ERROR_ARGS;
goto exit_label;
} }
/* Send request to the PMU */ /* Send request to the PMU */
PM_PACK_PAYLOAD4(payload, PM_CLOCK_SETDIVIDER, clock_id, div_id, val); PM_PACK_PAYLOAD4(payload, PM_CLOCK_SETDIVIDER, clock_id, div_id, val);
return pm_ipi_send_sync(primary_proc, payload, NULL, 0); status = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
exit_label:
return status;
} }
/** /**
@ -1280,7 +1338,7 @@ enum pm_ret_status pm_clock_setdivider(uint32_t clock_id,
enum pm_ret_status pm_clock_getdivider(uint32_t clock_id, enum pm_ret_status pm_clock_getdivider(uint32_t clock_id,
uint32_t *divider) uint32_t *divider)
{ {
enum pm_ret_status status; enum pm_ret_status status = PM_RET_SUCCESS;
enum pm_node_id nid; enum pm_node_id nid;
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
uint32_t val; uint32_t val;
@ -1288,22 +1346,23 @@ enum pm_ret_status pm_clock_getdivider(uint32_t clock_id,
/* Get PLL node ID using PLL clock ID */ /* Get PLL node ID using PLL clock ID */
status = pm_clock_get_pll_node_id(clock_id, &nid); status = pm_clock_get_pll_node_id(clock_id, &nid);
if (status == PM_RET_SUCCESS) { if (status == PM_RET_SUCCESS) {
return pm_pll_get_parameter(nid, PM_PLL_PARAM_FBDIV, divider); status = pm_pll_get_parameter(nid, PM_PLL_PARAM_FBDIV, divider);
goto exit_label;
} }
/* Check if clock ID is a valid on-chip clock */ /* Check if clock ID is a valid on-chip clock */
status = pm_clock_id_is_valid(clock_id); status = pm_clock_id_is_valid(clock_id);
if (status != PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; goto exit_label;
} }
if ((pm_clock_has_div(clock_id, PM_CLOCK_DIV0_ID)) != 0U) { if ((pm_clock_has_div(clock_id, PM_CLOCK_DIV0_ID)) != 0U) {
/* Send request to the PMU to get div0 */ /* Send request to the PMU to get div0 */
PM_PACK_PAYLOAD3(payload, PM_CLOCK_GETDIVIDER, clock_id, PM_PACK_PAYLOAD3(payload, PM_CLOCK_GETDIVIDER, clock_id,
PM_CLOCK_DIV0_ID); PM_CLOCK_DIV0_ID);
status = pm_ipi_send_sync(primary_proc, payload, &val, 1); status = pm_ipi_send_sync(primary_proc, payload, &val, 1);
if (status != PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; goto exit_label;
} }
*divider = val; *divider = val;
} }
@ -1311,14 +1370,14 @@ enum pm_ret_status pm_clock_getdivider(uint32_t clock_id,
if ((pm_clock_has_div(clock_id, PM_CLOCK_DIV1_ID)) != 0U) { if ((pm_clock_has_div(clock_id, PM_CLOCK_DIV1_ID)) != 0U) {
/* Send request to the PMU to get div1 */ /* Send request to the PMU to get div1 */
PM_PACK_PAYLOAD3(payload, PM_CLOCK_GETDIVIDER, clock_id, PM_PACK_PAYLOAD3(payload, PM_CLOCK_GETDIVIDER, clock_id,
PM_CLOCK_DIV1_ID); PM_CLOCK_DIV1_ID);
status = pm_ipi_send_sync(primary_proc, payload, &val, 1); status = pm_ipi_send_sync(primary_proc, payload, &val, 1);
if (status != PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; goto exit_label;
} }
*divider |= val << 16; *divider |= val << 16;
} }
exit_label:
return status; return status;
} }
@ -1342,18 +1401,22 @@ enum pm_ret_status pm_clock_setparent(uint32_t clock_id,
/* First try to handle it as a PLL */ /* First try to handle it as a PLL */
pll = pm_clock_get_pll_by_related_clk(clock_id); pll = pm_clock_get_pll_by_related_clk(clock_id);
if (pll != NULL) { if (pll != NULL) {
return pm_clock_pll_set_parent(pll, clock_id, parent_index); status = pm_clock_pll_set_parent(pll, clock_id, parent_index);
goto exit_label;
} }
/* Check if clock ID is a valid on-chip clock */ /* Check if clock ID is a valid on-chip clock */
status = pm_clock_id_is_valid(clock_id); status = pm_clock_id_is_valid(clock_id);
if (status != PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; goto exit_label;
} }
/* Send request to the PMU */ /* Send request to the PMU */
PM_PACK_PAYLOAD3(payload, PM_CLOCK_SETPARENT, clock_id, parent_index); PM_PACK_PAYLOAD3(payload, PM_CLOCK_SETPARENT, clock_id, parent_index);
return pm_ipi_send_sync(primary_proc, payload, NULL, 0); status = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
exit_label:
return status;
} }
/** /**
@ -1377,18 +1440,22 @@ enum pm_ret_status pm_clock_getparent(uint32_t clock_id,
/* First try to handle it as a PLL */ /* First try to handle it as a PLL */
pll = pm_clock_get_pll_by_related_clk(clock_id); pll = pm_clock_get_pll_by_related_clk(clock_id);
if (pll != NULL) { if (pll != NULL) {
return pm_clock_pll_get_parent(pll, clock_id, parent_index); status = pm_clock_pll_get_parent(pll, clock_id, parent_index);
goto exit_label;
} }
/* Check if clock ID is a valid on-chip clock */ /* Check if clock ID is a valid on-chip clock */
status = pm_clock_id_is_valid(clock_id); status = pm_clock_id_is_valid(clock_id);
if (status != PM_RET_SUCCESS) { if (status != PM_RET_SUCCESS) {
return status; goto exit_label;
} }
/* Send request to the PMU */ /* Send request to the PMU */
PM_PACK_PAYLOAD2(payload, PM_CLOCK_GETPARENT, clock_id); PM_PACK_PAYLOAD2(payload, PM_CLOCK_GETPARENT, clock_id);
return pm_ipi_send_sync(primary_proc, payload, parent_index, 1); status = pm_ipi_send_sync(primary_proc, payload, parent_index, 1);
exit_label:
return status;
} }
/** /**
@ -1655,20 +1722,26 @@ enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid,
uint32_t value) uint32_t value)
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status ret = 0;
/* Check if given node ID is a PLL node */ /* Check if given node ID is a PLL node */
if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) {
return PM_RET_ERROR_ARGS; ret = PM_RET_ERROR_ARGS;
goto exit_label;
} }
/* Check if parameter ID is valid and return an error if it's not */ /* Check if parameter ID is valid and return an error if it's not */
if (param_id >= PM_PLL_PARAM_MAX) { if (param_id >= PM_PLL_PARAM_MAX) {
return PM_RET_ERROR_ARGS; ret = PM_RET_ERROR_ARGS;
goto exit_label;
} }
/* Send request to the PMU */ /* Send request to the PMU */
PM_PACK_PAYLOAD4(payload, PM_PLL_SET_PARAMETER, nid, param_id, value); PM_PACK_PAYLOAD4(payload, PM_PLL_SET_PARAMETER, nid, param_id, value);
return pm_ipi_send_sync(primary_proc, payload, NULL, 0); ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
exit_label:
return ret;
} }
/** /**
@ -1686,20 +1759,26 @@ enum pm_ret_status pm_pll_get_parameter(enum pm_node_id nid,
uint32_t *value) uint32_t *value)
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status ret = PM_RET_SUCCESS;
/* Check if given node ID is a PLL node */ /* Check if given node ID is a PLL node */
if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) {
return PM_RET_ERROR_ARGS; ret = PM_RET_ERROR_ARGS;
goto exit_label;
} }
/* Check if parameter ID is valid and return an error if it's not */ /* Check if parameter ID is valid and return an error if it's not */
if (param_id >= PM_PLL_PARAM_MAX) { if (param_id >= PM_PLL_PARAM_MAX) {
return PM_RET_ERROR_ARGS; ret = PM_RET_ERROR_ARGS;
goto exit_label;
} }
/* Send request to the PMU */ /* Send request to the PMU */
PM_PACK_PAYLOAD3(payload, PM_PLL_GET_PARAMETER, nid, param_id); PM_PACK_PAYLOAD3(payload, PM_PLL_GET_PARAMETER, nid, param_id);
return pm_ipi_send_sync(primary_proc, payload, value, 1); ret = pm_ipi_send_sync(primary_proc, payload, value, 1);
exit_label:
return ret;
} }
/** /**
@ -1719,20 +1798,26 @@ enum pm_ret_status pm_pll_get_parameter(enum pm_node_id nid,
enum pm_ret_status pm_pll_set_mode(enum pm_node_id nid, enum pm_pll_mode mode) enum pm_ret_status pm_pll_set_mode(enum pm_node_id nid, enum pm_pll_mode mode)
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status ret = PM_RET_SUCCESS;
/* Check if given node ID is a PLL node */ /* Check if given node ID is a PLL node */
if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) {
return PM_RET_ERROR_ARGS; ret = PM_RET_ERROR_ARGS;
goto exit_label;
} }
/* Check if PLL mode is valid */ /* Check if PLL mode is valid */
if (mode >= PM_PLL_MODE_MAX) { if (mode >= PM_PLL_MODE_MAX) {
return PM_RET_ERROR_ARGS; ret = PM_RET_ERROR_ARGS;
goto exit_label;
} }
/* Send request to the PMU */ /* Send request to the PMU */
PM_PACK_PAYLOAD3(payload, PM_PLL_SET_MODE, nid, mode); PM_PACK_PAYLOAD3(payload, PM_PLL_SET_MODE, nid, mode);
return pm_ipi_send_sync(primary_proc, payload, NULL, 0); ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0);
exit_label:
return ret;
} }
/** /**
@ -1747,15 +1832,18 @@ enum pm_ret_status pm_pll_set_mode(enum pm_node_id nid, enum pm_pll_mode mode)
enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, enum pm_pll_mode *mode) enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, enum pm_pll_mode *mode)
{ {
uint32_t payload[PAYLOAD_ARG_CNT]; uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status ret = PM_RET_SUCCESS;
/* Check if given node ID is a PLL node */ /* Check if given node ID is a PLL node */
if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) {
return PM_RET_ERROR_ARGS; ret = PM_RET_ERROR_ARGS;
} else {
/* Send request to the PMU */
PM_PACK_PAYLOAD2(payload, PM_PLL_GET_MODE, nid);
ret = pm_ipi_send_sync(primary_proc, payload, mode, 1);
} }
/* Send request to the PMU */ return ret;
PM_PACK_PAYLOAD2(payload, PM_PLL_GET_MODE, nid);
return pm_ipi_send_sync(primary_proc, payload, mode, 1);
} }
/** /**
@ -1783,7 +1871,8 @@ enum pm_ret_status pm_register_access(uint32_t register_access_id,
((CSUDMA_BASE & address) != CSUDMA_BASE) && ((CSUDMA_BASE & address) != CSUDMA_BASE) &&
((RSA_CORE_BASE & address) != RSA_CORE_BASE) && ((RSA_CORE_BASE & address) != RSA_CORE_BASE) &&
((PMU_GLOBAL_BASE & address) != PMU_GLOBAL_BASE)) { ((PMU_GLOBAL_BASE & address) != PMU_GLOBAL_BASE)) {
return PM_RET_ERROR_ACCESS; ret = PM_RET_ERROR_ACCESS;
goto exit_label;
} }
switch (register_access_id) { switch (register_access_id) {
@ -1798,6 +1887,8 @@ enum pm_ret_status pm_register_access(uint32_t register_access_id,
WARN("Unimplemented register_access call\n\r"); WARN("Unimplemented register_access call\n\r");
break; break;
} }
exit_label:
return ret; return ret;
} }

View file

@ -220,6 +220,7 @@ err:
int32_t pm_setup(void) int32_t pm_setup(void)
{ {
enum pm_ret_status err; enum pm_ret_status err;
int32_t ret = -EINVAL;
pm_ipi_init(primary_proc); pm_ipi_init(primary_proc);
@ -227,17 +228,17 @@ int32_t pm_setup(void)
if (err != PM_RET_SUCCESS) { if (err != PM_RET_SUCCESS) {
ERROR("BL31: Failed to read Platform Management API version. " ERROR("BL31: Failed to read Platform Management API version. "
"Return: %d\n", err); "Return: %d\n", err);
return -EINVAL; goto exit_label;
} }
if (pm_ctx.api_version < PM_VERSION) { if (pm_ctx.api_version < PM_VERSION) {
ERROR("BL31: Platform Management API version error. Expected: " ERROR("BL31: Platform Management API version error. Expected: "
"v%d.%d - Found: v%d.%d\n", PM_VERSION_MAJOR, "v%d.%d - Found: v%d.%d\n", PM_VERSION_MAJOR,
PM_VERSION_MINOR, pm_ctx.api_version >> 16, PM_VERSION_MINOR, pm_ctx.api_version >> 16,
pm_ctx.api_version & 0xFFFFU); pm_ctx.api_version & 0xFFFFU);
return -EINVAL; goto exit_label;
} }
int32_t status = 0, ret = 0; int32_t status = 0;
#if ZYNQMP_WDT_RESTART #if ZYNQMP_WDT_RESTART
status = pm_wdt_restart_setup(); status = pm_wdt_restart_setup();
if (status) if (status)
@ -255,6 +256,7 @@ int32_t pm_setup(void)
pm_up = (status == 0); pm_up = (status == 0);
exit_label:
return ret; return ret;
} }