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docs: update PSCI reference
PSCI specification reference in the documentation is updated to point to latest specification and duplicate PSCI references are removed. Change-Id: I35ee365f08c557f3017af4d51f6d063a7501b27e Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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Manish V Badarkhe
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6 changed files with 25 additions and 30 deletions
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@ -9,12 +9,12 @@ The TBB sequence starts when the platform is powered on and runs up
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to the stage where it hands-off control to firmware running in the normal
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world in DRAM. This is the cold boot path.
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TF-A also implements the `Power State Coordination Interface PDD`_ as a
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runtime service. PSCI is the interface from normal world software to firmware
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implementing power management use-cases (for example, secondary CPU boot,
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hotplug and idle). Normal world software can access TF-A runtime services via
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the Arm SMC (Secure Monitor Call) instruction. The SMC instruction must be
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used as mandated by the SMC Calling Convention (`SMCCC`_).
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TF-A also implements the `PSCI`_ as a runtime service. PSCI is the interface
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from normal world software to firmware implementing power management use-cases
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(for example, secondary CPU boot, hotplug and idle). Normal world software can
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access TF-A runtime services via the Arm SMC (Secure Monitor Call) instruction.
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The SMC instruction must be used as mandated by the SMC Calling Convention
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(`SMCCC`_).
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TF-A implements a framework for configuring and managing interrupts generated
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in either security state. The details of the interrupt management framework
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@ -400,8 +400,7 @@ initialization is complete. Hence, BL2 populates a platform-specific area of
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memory with the entrypoint and Saved Program Status Register (``SPSR``) of the
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normal world software image. The entrypoint is the load address of the BL33
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image. The ``SPSR`` is determined as specified in Section 5.13 of the
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`Power State Coordination Interface PDD`_. This information is passed to the
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EL3 Runtime Software.
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`PSCI`_. This information is passed to the EL3 Runtime Software.
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AArch64 BL31 (EL3 Runtime Software) execution
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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@ -952,8 +951,8 @@ TODO: Provide design walkthrough of PSCI implementation.
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The PSCI v1.1 specification categorizes APIs as optional and mandatory. All the
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mandatory APIs in PSCI v1.1, PSCI v1.0 and in PSCI v0.2 draft specification
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`Power State Coordination Interface PDD`_ are implemented. The table lists
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the PSCI v1.1 APIs and their support in generic code.
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`PSCI`_ are implemented. The table lists the PSCI v1.1 APIs and their support
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in generic code.
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An API implementation might have a dependency on platform code e.g. CPU_SUSPEND
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requires the platform to export a part of the implementation. Hence the level
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@ -2731,7 +2730,7 @@ kernel at boot time. These can be found in the ``fdts`` directory.
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- `Trusted Board Boot Requirements CLIENT (TBBR-CLIENT) Armv8-A (ARM DEN0006D)`_
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- `Power State Coordination Interface PDD`_
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- `PSCI`_
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- `SMC Calling Convention`_
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@ -2741,10 +2740,8 @@ kernel at boot time. These can be found in the ``fdts`` directory.
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*Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.*
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.. _Power State Coordination Interface PDD: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
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.. _SMCCC: https://developer.arm.com/docs/den0028/latest
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.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
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.. _Power State Coordination Interface PDD: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
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.. _PSCI: https://developer.arm.com/documentation/den0022/latest/
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.. _Arm ARM: https://developer.arm.com/docs/ddi0487/latest
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.. _SMC Calling Convention: https://developer.arm.com/docs/den0028/latest
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.. _Trusted Board Boot Requirements CLIENT (TBBR-CLIENT) Armv8-A (ARM DEN0006D): https://developer.arm.com/docs/den0006/latest/trusted-board-boot-requirements-client-tbbr-client-armv8-a
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@ -3,7 +3,7 @@ PSCI Library Integration guide for Armv8-A AArch32 systems
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This document describes the PSCI library interface with a focus on how to
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integrate with a suitable Trusted OS for an Armv8-A AArch32 system. The PSCI
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Library implements the PSCI Standard as described in `PSCI spec`_ and is meant
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Library implements the PSCI Standard as described in `PSCI`_ and is meant
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to be integrated with EL3 Runtime Software which invokes the PSCI Library
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interface appropriately. **EL3 Runtime Software** refers to software executing
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at the highest secure privileged mode, which is EL3 in AArch64 or Secure SVC/
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@ -74,7 +74,7 @@ PSCI CPU context management
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---------------------------
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PSCI library is in charge of initializing/restoring the non-secure CPU system
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registers according to `PSCI specification`_ during cold/warm boot.
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registers according to `PSCI`_ during cold/warm boot.
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This is referred to as ``PSCI CPU Context Management``. Registers that need to
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be preserved across CPU power down/power up cycles are maintained in
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``cpu_context_t`` data structure. The initialization of other non-secure CPU
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@ -120,8 +120,8 @@ to CPU context ``cpu_context_t`` data and these are described in
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PSCI Library Interface
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----------------------
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The PSCI library implements the `PSCI Specification`_. The interfaces
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to this library are declared in ``psci_lib.h`` and are as listed below:
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The PSCI library implements the `PSCI`_. The interfaces to this library are
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declared in ``psci_lib.h`` and are as listed below:
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.. code:: c
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@ -254,7 +254,7 @@ PSCI service range specified in `SMCCC`_. The function ID ``smc_fid`` (first
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argument) determines the PSCI API to be called. The ``x1`` to ``x4`` (2nd to 5th
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arguments), are the values of the registers r1 - r4 (in AArch32) or x1 - x4
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(in AArch64) when the SMC is received. These are the arguments to PSCI API as
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described in `PSCI spec`_. The 'flags' (8th argument) is a bit field parameter
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described in `PSCI`_. The 'flags' (8th argument) is a bit field parameter
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and is detailed in 'smccc.h' header. It includes whether the call is from the
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secure or non-secure world. The ``cookie`` (6th argument) and the ``handle``
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(7th argument) are not used and are reserved for future use.
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@ -273,7 +273,7 @@ Interface : psci_warmboot_entrypoint()
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Return : void
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This function performs the warm boot initialization/restoration as mandated by
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`PSCI spec`_. For AArch32, on wakeup from power down the CPU resets to secure SVC
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`PSCI`_. For AArch32, on wakeup from power down the CPU resets to secure SVC
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mode and the EL3 Runtime Software must perform the prerequisite initializations
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mentioned at top of this section. This function must be called with Data cache
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disabled (unless build option ``HW_ASSISTED_COHERENCY`` is enabled) but with MMU
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@ -496,7 +496,7 @@ A brief description of each callback is given below:
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This callback is called in response to PSCI_MIGRATE_INFO_TYPE or
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PSCI_MIGRATE_INFO_UP_CPU APIs. The return value of this callback must
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correspond to the return value of PSCI_MIGRATE_INFO_TYPE API as described
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in `PSCI spec`_. If the secure payload is a Uniprocessor (UP)
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in `PSCI`_. If the secure payload is a Uniprocessor (UP)
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implementation, then it must update the mpidr of the CPU it is resident in
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via ``resident_cpu`` (first argument). The updates to ``resident_cpu`` is
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ignored if the secure payload is a multiprocessor (MP) implementation.
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@ -528,9 +528,7 @@ workarounds.
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--------------
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*Copyright (c) 2016-2020, Arm Limited and Contributors. All rights reserved.*
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*Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.*
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.. _PSCI spec: http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
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.. _PSCI: https://developer.arm.com/documentation/den0022/latest/
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.. _SMCCC: https://developer.arm.com/docs/den0028/latest
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.. _PSCI specification: http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
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.. _PSCI Specification: http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
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@ -314,7 +314,7 @@ provide this information....
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--------------
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*Copyright (c) 2014-2021, Arm Limited and Contributors. All rights reserved.*
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*Copyright (c) 2014-2023, Arm Limited and Contributors. All rights reserved.*
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.. _SMCCC: https://developer.arm.com/docs/den0028/latest
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.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
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.. _PSCI: https://developer.arm.com/documentation/den0022/latest/
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@ -90,7 +90,7 @@ have previously been raised against the software.
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.. _Armv7-A and Armv8-A: https://developer.arm.com/products/architecture/a-profile
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.. _Secure Monitor: http://www.arm.com/products/processors/technologies/trustzone/tee-smc.php
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.. _Power State Coordination Interface (PSCI): http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
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.. _Power State Coordination Interface (PSCI): https://developer.arm.com/documentation/den0022/latest/
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.. _Trusted Board Boot Requirements CLIENT (TBBR-CLIENT): https://developer.arm.com/docs/den0006/latest/trusted-board-boot-requirements-client-tbbr-client-armv8-a
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.. _System Control and Management Interface (SCMI): http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
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.. _Software Delegated Exception Interface (SDEI): http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf
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@ -249,4 +249,4 @@ configure it.
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.. _build the binaries from source: https://github.com/ARM-software/SCP-firmware/blob/master/user_guide.md#scp-firmware-user-guide
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.. _Arm Platforms Portal: https://community.arm.com/dev-platforms/
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.. _Juno Getting Started Guide: https://developer.arm.com/documentation/den0928/f/?lang=en
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.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022d/Power_State_Coordination_Interface_PDD_v1_1_DEN0022D.pdf
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.. _PSCI: https://developer.arm.com/documentation/den0022/latest/
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@ -3668,7 +3668,7 @@ amount of open resources per driver.
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*Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.*
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.. _PSCI: http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
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.. _PSCI: https://developer.arm.com/documentation/den0022/latest/
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.. _Arm Generic Interrupt Controller version 2.0 (GICv2): http://infocenter.arm.com/help/topic/com.arm.doc.ihi0048b/index.html
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.. _3.0 (GICv3): http://infocenter.arm.com/help/topic/com.arm.doc.ihi0069b/index.html
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.. _FreeBSD: https://www.freebsd.org
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