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PSCI: Fix logic error to skip cache flushing
If either USE_COHERENT_MEM or HW_ASSISTED_COHERENCY being true should cause us to not enter the ifdef block, then the logic is not correct here. Posibly bad use of De Morgan's law? Fix this. Signed-off-by: Andrew F. Davis <afd@ti.com>
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1 changed files with 2 additions and 2 deletions
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@ -267,7 +267,7 @@ static plat_local_state_t *psci_get_req_local_pwr_states(unsigned int pwrlvl,
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static plat_local_state_t get_non_cpu_pd_node_local_state(
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unsigned int parent_idx)
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{
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#if !USE_COHERENT_MEM || !HW_ASSISTED_COHERENCY
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#if !(USE_COHERENT_MEM || HW_ASSISTED_COHERENCY)
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flush_dcache_range(
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(uintptr_t) &psci_non_cpu_pd_nodes[parent_idx],
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sizeof(psci_non_cpu_pd_nodes[parent_idx]));
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@ -283,7 +283,7 @@ static void set_non_cpu_pd_node_local_state(unsigned int parent_idx,
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plat_local_state_t state)
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{
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psci_non_cpu_pd_nodes[parent_idx].local_state = state;
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#if !USE_COHERENT_MEM || !HW_ASSISTED_COHERENCY
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#if !(USE_COHERENT_MEM || HW_ASSISTED_COHERENCY)
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flush_dcache_range(
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(uintptr_t) &psci_non_cpu_pd_nodes[parent_idx],
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sizeof(psci_non_cpu_pd_nodes[parent_idx]));
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