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feat(stm32mp2): display CPU info

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Print information about CPU type, package and revision.
SoC revision ID of MP2 family are defined with the OTP 102.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I14a95c8a7cb9b06ce32c2e592ae69a1741067e8d
This commit is contained in:
Yann Gautier 2024-06-21 14:49:47 +02:00
parent 154e6e62fe
commit 381b2a6b02
4 changed files with 203 additions and 0 deletions
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3
fdts/stm32mp251.dtsi
View file

@ -146,6 +146,9 @@
nand2_otp: otp20@50 {
reg = <0x50 0x4>;
};
rev_otp@198 {
reg = <0x198 0x4>;
};
package_otp: package-otp@1e8 {
reg = <0x1e8 0x1>;
};

2
plat/st/stm32mp2/bl2_plat_setup.c
View file

@ -195,6 +195,8 @@ void bl2_el3_plat_arch_setup(void)
goto skip_console_init;
}
stm32mp_print_cpuinfo();
board_model = dt_get_board_model();
if (board_model != NULL) {
NOTICE("Model: %s\n", board_model);

38
plat/st/stm32mp2/stm32mp2_def.h
View file

@ -29,6 +29,43 @@
#include <stm32mp_shared_resources.h>
#endif
/*******************************************************************************
* CHIP ID
******************************************************************************/
#define STM32MP2_CHIP_ID U(0x505)
#define STM32MP251A_PART_NB U(0x400B3E6D)
#define STM32MP251C_PART_NB U(0x000B306D)
#define STM32MP251D_PART_NB U(0xC00B3E6D)
#define STM32MP251F_PART_NB U(0x800B306D)
#define STM32MP253A_PART_NB U(0x400B3E0C)
#define STM32MP253C_PART_NB U(0x000B300C)
#define STM32MP253D_PART_NB U(0xC00B3E0C)
#define STM32MP253F_PART_NB U(0x800B300C)
#define STM32MP255A_PART_NB U(0x40082E00)
#define STM32MP255C_PART_NB U(0x00082000)
#define STM32MP255D_PART_NB U(0xC0082E00)
#define STM32MP255F_PART_NB U(0x80082000)
#define STM32MP257A_PART_NB U(0x40002E00)
#define STM32MP257C_PART_NB U(0x00002000)
#define STM32MP257D_PART_NB U(0xC0002E00)
#define STM32MP257F_PART_NB U(0x80002000)
#define STM32MP2_REV_A U(0x08)
#define STM32MP2_REV_B U(0x10)
#define STM32MP2_REV_X U(0x12)
#define STM32MP2_REV_Y U(0x11)
#define STM32MP2_REV_Z U(0x09)
/*******************************************************************************
* PACKAGE ID
******************************************************************************/
#define STM32MP25_PKG_CUSTOM U(0)
#define STM32MP25_PKG_AL_VFBGA361 U(1)
#define STM32MP25_PKG_AK_VFBGA424 U(3)
#define STM32MP25_PKG_AI_TFBGA436 U(5)
#define STM32MP25_PKG_UNKNOWN U(7)
/*******************************************************************************
* STM32MP2 memory map related constants
******************************************************************************/
@ -194,6 +231,7 @@ enum ddr_type {
/* OTP labels */
#define PART_NUMBER_OTP "part-number-otp"
#define REVISION_OTP "rev_otp"
#define PACKAGE_OTP "package-otp"
#define HCONF1_OTP "otp124"
#define NAND_OTP "otp16"

160
plat/st/stm32mp2/stm32mp2_private.c
View file

@ -75,6 +75,166 @@ unsigned long stm32_get_gpio_bank_clock(unsigned int bank)
return CK_BUS_GPIOA + (bank - GPIO_BANK_A);
}
uint32_t stm32mp_get_chip_version(void)
{
static uint32_t rev;
if (rev != 0U) {
return rev;
}
if (stm32_get_otp_value(REVISION_OTP, &rev) != 0) {
panic();
}
return rev;
}
uint32_t stm32mp_get_chip_dev_id(void)
{
return stm32mp_syscfg_get_chip_dev_id();
}
static uint32_t get_part_number(void)
{
static uint32_t part_number;
if (part_number != 0U) {
return part_number;
}
if (stm32_get_otp_value(PART_NUMBER_OTP, &part_number) != 0) {
panic();
}
return part_number;
}
static uint32_t get_cpu_package(void)
{
static uint32_t package = UINT32_MAX;
if (package == UINT32_MAX) {
if (stm32_get_otp_value(PACKAGE_OTP, &package) != 0) {
panic();
}
}
return (package & PACKAGE_OTP_PKG_MASK) >> PACKAGE_OTP_PKG_SHIFT;
}
void stm32mp_get_soc_name(char name[STM32_SOC_NAME_SIZE])
{
char *cpu_s, *cpu_r, *pkg;
/* MPUs Part Numbers */
switch (get_part_number()) {
case STM32MP251A_PART_NB:
cpu_s = "251A";
break;
case STM32MP251C_PART_NB:
cpu_s = "251C";
break;
case STM32MP251D_PART_NB:
cpu_s = "251D";
break;
case STM32MP251F_PART_NB:
cpu_s = "251F";
break;
case STM32MP253A_PART_NB:
cpu_s = "253A";
break;
case STM32MP253C_PART_NB:
cpu_s = "253C";
break;
case STM32MP253D_PART_NB:
cpu_s = "253D";
break;
case STM32MP253F_PART_NB:
cpu_s = "253F";
break;
case STM32MP255A_PART_NB:
cpu_s = "255A";
break;
case STM32MP255C_PART_NB:
cpu_s = "255C";
break;
case STM32MP255D_PART_NB:
cpu_s = "255D";
break;
case STM32MP255F_PART_NB:
cpu_s = "255F";
break;
case STM32MP257A_PART_NB:
cpu_s = "257A";
break;
case STM32MP257C_PART_NB:
cpu_s = "257C";
break;
case STM32MP257D_PART_NB:
cpu_s = "257D";
break;
case STM32MP257F_PART_NB:
cpu_s = "257F";
break;
default:
cpu_s = "????";
break;
}
/* Package */
switch (get_cpu_package()) {
case STM32MP25_PKG_CUSTOM:
pkg = "XX";
break;
case STM32MP25_PKG_AL_VFBGA361:
pkg = "AL";
break;
case STM32MP25_PKG_AK_VFBGA424:
pkg = "AK";
break;
case STM32MP25_PKG_AI_TFBGA436:
pkg = "AI";
break;
default:
pkg = "??";
break;
}
/* REVISION */
switch (stm32mp_get_chip_version()) {
case STM32MP2_REV_A:
cpu_r = "A";
break;
case STM32MP2_REV_B:
cpu_r = "B";
break;
case STM32MP2_REV_X:
cpu_r = "X";
break;
case STM32MP2_REV_Y:
cpu_r = "Y";
break;
case STM32MP2_REV_Z:
cpu_r = "Z";
break;
default:
cpu_r = "?";
break;
}
snprintf(name, STM32_SOC_NAME_SIZE,
"STM32MP%s%s Rev.%s", cpu_s, pkg, cpu_r);
}
void stm32mp_print_cpuinfo(void)
{
char name[STM32_SOC_NAME_SIZE];
stm32mp_get_soc_name(name);
NOTICE("CPU: %s\n", name);
}
uintptr_t stm32_get_bkpr_boot_mode_addr(void)
{
return tamp_bkpr(BKPR_BOOT_MODE);