mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 09:34:18 +00:00
arm: Shorten the Firmware Update (FWU) process
The watchdog is configured with a default value of 256 seconds in order to implement the Trusted Board Boot Requirements. For the FVP and Juno platforms, the FWU process relies on a watchdog reset. In order to automate the test of FWU, the length of this process needs to be as short as possible. Instead of waiting for those 4 minutes to have a reset by the watchdog, tell it to reset immediately. There are no side effects as the value of the watchdog's load register resets to 0xFFFFFFFF. Tested on Juno. Change-Id: Ib1aea80ceddc18ff1e0813a5b98dd141ba8a3ff2 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
This commit is contained in:
parent
b514ee86c4
commit
37b70031e0
20 changed files with 192 additions and 51 deletions
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@ -252,7 +252,7 @@ void plat_arm_interconnect_enter_coherency(void);
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void plat_arm_interconnect_exit_coherency(void);
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void plat_arm_program_trusted_mailbox(uintptr_t address);
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int plat_arm_bl1_fwu_needed(void);
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void plat_arm_error_handler(int err);
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__dead2 void plat_arm_error_handler(int err);
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#if ARM_PLAT_MT
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unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr);
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17
plat/arm/board/a5ds/a5ds_err.c
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17
plat/arm/board/a5ds/a5ds_err.c
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@ -0,0 +1,17 @@
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/*
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* Copyright (c) 2019, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/arm/common/plat_arm.h>
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/*
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* a5ds error handler
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*/
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void __dead2 plat_arm_error_handler(int err)
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{
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while (1) {
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wfi();
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}
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}
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@ -36,6 +36,7 @@ BL1_SOURCES += drivers/io/io_fip.c \
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drivers/cfi/v2m/v2m_flash.c \
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plat/arm/common/arm_bl1_setup.c \
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plat/arm/common/arm_err.c \
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plat/arm/board/a5ds/a5ds_err.c \
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plat/arm/common/arm_io_storage.c \
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plat/arm/board/a5ds/${ARCH}/a5ds_helpers.S \
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plat/arm/board/a5ds/a5ds_bl1_setup.c \
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@ -55,6 +56,7 @@ BL2_SOURCES += lib/aarch32/arm32_aeabi_divmod.c \
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plat/arm/board/a5ds/a5ds_bl2_setup.c \
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plat/arm/common/arm_bl2_setup.c \
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plat/arm/common/arm_err.c \
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plat/arm/board/a5ds/a5ds_err.c \
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plat/arm/common/arm_io_storage.c \
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plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c \
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plat/arm/common/arm_image_load.c \
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@ -52,3 +52,12 @@ void bl1_platform_setup(void)
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if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U)
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smmuv3_security_init(PLAT_FVP_SMMUV3_BASE);
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}
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__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
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{
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/* Setup the watchdog to reset the system as soon as possible */
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sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
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while (1)
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wfi();
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}
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48
plat/arm/board/fvp/fvp_err.c
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48
plat/arm/board/fvp/fvp_err.c
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@ -0,0 +1,48 @@
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/*
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* Copyright (c) 2019, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <errno.h>
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#include <common/debug.h>
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#include <drivers/arm/sp805.h>
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#include <drivers/cfi/v2m_flash.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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/*
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* FVP error handler
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*/
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__dead2 void plat_arm_error_handler(int err)
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{
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int ret;
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switch (err) {
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case -ENOENT:
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case -EAUTH:
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/* Image load or authentication error. Erase the ToC */
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INFO("Erasing FIP ToC from flash...\n");
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(void)nor_unlock(PLAT_ARM_FIP_BASE);
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ret = nor_word_program(PLAT_ARM_FIP_BASE, 0);
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if (ret != 0) {
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ERROR("Cannot erase ToC\n");
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} else {
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INFO("Done\n");
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}
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break;
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default:
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/* Unexpected error */
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break;
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}
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(void)console_flush();
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/* Setup the watchdog to reset the system as soon as possible */
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sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
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for (;;)
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wfi();
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}
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@ -131,17 +131,20 @@ BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
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plat/arm/board/fvp/fvp_bl1_setup.c \
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plat/arm/board/fvp/fvp_err.c \
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plat/arm/board/fvp/fvp_io_storage.c \
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plat/arm/board/fvp/fvp_trusted_boot.c \
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${FVP_CPU_LIBS} \
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${FVP_INTERCONNECT_SOURCES}
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BL2_SOURCES += drivers/io/io_semihosting.c \
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BL2_SOURCES += drivers/arm/sp805/sp805.c \
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drivers/io/io_semihosting.c \
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lib/utils/mem_region.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/board/fvp/fvp_bl2_setup.c \
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plat/arm/board/fvp/fvp_err.c \
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plat/arm/board/fvp/fvp_io_storage.c \
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plat/arm/board/fvp/fvp_trusted_boot.c \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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17
plat/arm/board/fvp_ve/fvp_ve_err.c
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17
plat/arm/board/fvp_ve/fvp_ve_err.c
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@ -0,0 +1,17 @@
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/*
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* Copyright (c) 2019, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/arm/common/plat_arm.h>
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/*
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* FVP VE error handler
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*/
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void __dead2 plat_arm_error_handler(int err)
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{
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while (1) {
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wfi();
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}
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}
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@ -40,6 +40,7 @@ BL1_SOURCES += drivers/arm/sp805/sp805.c \
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drivers/io/io_storage.c \
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plat/arm/common/arm_bl1_setup.c \
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plat/arm/common/arm_err.c \
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plat/arm/board/fvp_ve/fvp_ve_err.c \
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plat/arm/common/arm_io_storage.c \
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drivers/cfi/v2m/v2m_flash.c \
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plat/arm/board/fvp_ve/${ARCH}/fvp_ve_helpers.S \
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@ -60,6 +61,7 @@ BL2_SOURCES += plat/arm/board/fvp_ve/fvp_ve_bl2_setup.c \
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drivers/io/io_storage.c \
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plat/arm/common/arm_bl2_setup.c \
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plat/arm/common/arm_err.c \
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plat/arm/board/fvp_ve/fvp_ve_err.c \
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plat/arm/common/arm_io_storage.c \
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plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c \
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plat/arm/common/arm_image_load.c \
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@ -98,6 +98,9 @@ __dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
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/* Clear the NV flags register. */
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*nv_flags_clr = *nv_flags_ptr;
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/* Setup the watchdog to reset the system as soon as possible */
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sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
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while (1)
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wfi();
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}
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@ -7,6 +7,7 @@
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#include <errno.h>
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#include <arch_helpers.h>
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#include <drivers/arm/sp805.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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/* Propagate the err code in the NV-flags register */
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*flags_ptr = err;
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/* Loop until the watchdog resets the system */
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/* Setup the watchdog to reset the system as soon as possible */
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sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
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for (;;)
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wfi();
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}
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@ -66,7 +66,8 @@ BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \
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${JUNO_INTERCONNECT_SOURCES} \
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${JUNO_SECURITY_SOURCES}
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BL2_SOURCES += lib/utils/mem_region.c \
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BL2_SOURCES += drivers/arm/sp805/sp805.c \
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lib/utils/mem_region.c \
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plat/arm/board/juno/juno_err.c \
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plat/arm/board/juno/juno_bl2_setup.c \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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@ -12,10 +12,12 @@ PLAT_INCLUDES += -I${RDE1EDGE_BASE}/include/
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SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_e1.S
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BL1_SOURCES += ${SGI_CPU_SOURCES}
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BL1_SOURCES += ${SGI_CPU_SOURCES} \
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${RDE1EDGE_BASE}/rde1edge_err.c
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BL2_SOURCES += ${RDE1EDGE_BASE}/rde1edge_plat.c \
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${RDE1EDGE_BASE}/rde1edge_security.c \
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${RDE1EDGE_BASE}/rde1edge_err.c \
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drivers/arm/tzc/tzc_dmc620.c \
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lib/utils/mem_region.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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17
plat/arm/board/rde1edge/rde1edge_err.c
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17
plat/arm/board/rde1edge/rde1edge_err.c
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@ -0,0 +1,17 @@
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/*
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* Copyright (c) 2019, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/arm/common/plat_arm.h>
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/*
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* rde1edge error handler
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*/
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void __dead2 plat_arm_error_handler(int err)
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{
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while (1) {
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wfi();
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}
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}
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@ -12,10 +12,12 @@ PLAT_INCLUDES += -I${RDN1EDGE_BASE}/include/
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SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
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BL1_SOURCES += ${SGI_CPU_SOURCES}
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BL1_SOURCES += ${SGI_CPU_SOURCES} \
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${RDN1EDGE_BASE}/rdn1edge_err.c
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BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_plat.c \
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${RDN1EDGE_BASE}/rdn1edge_security.c \
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${RDN1EDGE_BASE}/rdn1edge_err.c \
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drivers/arm/tzc/tzc_dmc620.c \
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lib/utils/mem_region.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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17
plat/arm/board/rdn1edge/rdn1edge_err.c
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17
plat/arm/board/rdn1edge/rdn1edge_err.c
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/*
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* Copyright (c) 2019, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/arm/common/plat_arm.h>
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/*
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* rdn1edge error handler
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*/
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void __dead2 plat_arm_error_handler(int err)
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{
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while (1) {
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wfi();
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}
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}
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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SGI_CPU_SOURCES := lib/cpus/aarch64/cortex_a75.S
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BL1_SOURCES += ${SGI_CPU_SOURCES}
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BL1_SOURCES += ${SGI_CPU_SOURCES} \
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${SGI575_BASE}/sgi575_err.c
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BL2_SOURCES += ${SGI575_BASE}/sgi575_plat.c \
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${SGI575_BASE}/sgi575_security.c \
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${SGI575_BASE}/sgi575_err.c \
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drivers/arm/tzc/tzc_dmc620.c \
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lib/utils/mem_region.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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17
plat/arm/board/sgi575/sgi575_err.c
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17
plat/arm/board/sgi575/sgi575_err.c
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/*
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* Copyright (c) 2019, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/arm/common/plat_arm.h>
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/*
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* sgi575 error handler
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*/
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void __dead2 plat_arm_error_handler(int err)
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{
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while (1) {
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wfi();
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}
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}
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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PLAT_INCLUDES +=-I${SGM775_BASE}/include/
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BL1_SOURCES += ${SGM775_BASE}/sgm775_err.c
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BL2_SOURCES += lib/utils/mem_region.c \
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${SGM775_BASE}/sgm775_err.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \
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17
plat/arm/board/sgm775/sgm775_err.c
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17
plat/arm/board/sgm775/sgm775_err.c
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/*
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* Copyright (c) 2019, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat/arm/common/plat_arm.h>
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/*
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* sgm775 error handler
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*/
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void __dead2 plat_arm_error_handler(int err)
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{
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while (1) {
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wfi();
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}
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}
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@ -1,55 +1,14 @@
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <errno.h>
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#include <stdint.h>
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#include <platform_def.h>
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <drivers/cfi/v2m_flash.h>
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#include <drivers/console.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#pragma weak plat_arm_error_handler
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/*
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* ARM common implementation for error handler
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*/
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void __dead2 plat_arm_error_handler(int err)
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{
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int ret;
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switch (err) {
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case -ENOENT:
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case -EAUTH:
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/* Image load or authentication error. Erase the ToC */
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INFO("Erasing FIP ToC from flash...\n");
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(void)nor_unlock(PLAT_ARM_FIP_BASE);
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ret = nor_word_program(PLAT_ARM_FIP_BASE, 0);
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if (ret != 0) {
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ERROR("Cannot erase ToC\n");
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} else {
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INFO("Done\n");
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}
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break;
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default:
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/* Unexpected error */
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break;
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}
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(void)console_flush();
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/* Loop until the watchdog resets the system */
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for (;;)
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wfi();
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}
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void __dead2 plat_error_handler(int err)
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{
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plat_arm_error_handler(err);
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