mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-17 01:54:22 +00:00
fix(gicv3): move invocation of gicv3_get_multichip_base function
gicv3_get_multichip_base in case of GICV3_IMPL_GIC600_MULTICHIP flag being set, only works if the id belongs to SPI range. Moving invocation of the function after confirming that the intr_num belongs to SPI range. Signed-off-by: sahil <sahil@arm.com> Change-Id: I429eb473a7aeccb30309b1ffa5994663393ba0a2
This commit is contained in:
parent
69ed7dc2e9
commit
36704d09c6
1 changed files with 5 additions and 2 deletions
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2023, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
|
@ -223,13 +223,16 @@ unsigned int gicv3_secure_spis_config_props(uintptr_t gicd_base,
|
|||
current_prop = &interrupt_props[i];
|
||||
|
||||
unsigned int intr_num = current_prop->intr_num;
|
||||
uintptr_t multichip_gicd_base = gicv3_get_multichip_base(intr_num, gicd_base);
|
||||
uintptr_t multichip_gicd_base;
|
||||
|
||||
/* Skip SGI, (E)PPI and LPI interrupts */
|
||||
if (!IS_SPI(intr_num)) {
|
||||
continue;
|
||||
}
|
||||
|
||||
multichip_gicd_base =
|
||||
gicv3_get_multichip_base(intr_num, gicd_base);
|
||||
|
||||
/* Configure this interrupt as a secure interrupt */
|
||||
gicd_clr_igroupr(multichip_gicd_base, intr_num);
|
||||
|
||||
|
|
Loading…
Add table
Reference in a new issue