Workaround for Cortex A77 erratum 1925769

Cortex A77 erratum 1925769 is a Cat B erratum, present in older
revisions of the Cortex A77 processor core.  The workaround is to
set bit 8 in the ECTLR_EL1 register, there is a small performance cost
(<0.5%) for setting this bit.

SDEN can be found here:
https://documentation-service.arm.com/static/5f7c35d0d3be967f7be46d33

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I9cf0e0b5dc1e3e32e24279d2632c759cc7bd7ce9

docs/design/cpu-specific-build-macros.rst

@@ -260,6 +260,9 @@ For Cortex-A77, the following errata build flags are defined :
 -  ``ERRATA_A77_1800714``: This applies errata 1800714 workaround to Cortex-A77
    CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
 
+-  ``ERRATA_A77_1925769``: This applies errata 1925769 workaround to Cortex-A77
+   CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
+
 For Cortex-A78, the following errata build flags are defined :
 
 -  ``ERRATA_A78_1688305``: This applies errata 1688305 workaround to Cortex-A78

include/lib/cpus/aarch64/cortex_a77.h

@@ -16,6 +16,7 @@
  * CPU Extended Control register specific definitions.
  ******************************************************************************/
 #define CORTEX_A77_CPUECTLR_EL1				S3_0_C15_C1_4
+#define CORTEX_A77_CPUECTLR_EL1_BIT_8			(ULL(1) << 8)
 #define CORTEX_A77_CPUECTLR_EL1_BIT_53			(ULL(1) << 53)
 
 /*******************************************************************************

lib/cpus/aarch64/cortex_a77.S

@@ -114,6 +114,35 @@ func check_errata_1800714
 	b	cpu_rev_var_ls
 endfunc check_errata_1800714
 
+	/* --------------------------------------------------
+	 * Errata Workaround for Cortex A77 Errata #1925769.
+	 * This applies to revision <= r1p1 of Cortex A77.
+	 * Inputs:
+	 * x0: variant[4:7] and revision[0:3] of current cpu.
+	 * Shall clobber: x0-x17
+	 * --------------------------------------------------
+	 */
+func errata_a77_1925769_wa
+	/* Compare x0 against revision <= r1p1 */
+	mov	x17, x30
+	bl	check_errata_1925769
+	cbz	x0, 1f
+
+	/* Set bit 8 in ECTLR_EL1 */
+	mrs	x1, CORTEX_A77_CPUECTLR_EL1
+	orr	x1, x1, #CORTEX_A77_CPUECTLR_EL1_BIT_8
+	msr	CORTEX_A77_CPUECTLR_EL1, x1
+	isb
+1:
+	ret	x17
+endfunc errata_a77_1925769_wa
+
+func check_errata_1925769
+	/* Applies to everything <= r1p1 */
+	mov	x1, #0x11
+	b	cpu_rev_var_ls
+endfunc check_errata_1925769
+
 	/* -------------------------------------------------
 	 * The CPU Ops reset function for Cortex-A77.
 	 * Shall clobber: x0-x19
@@ -134,6 +163,11 @@ func cortex_a77_reset_func
 	bl	errata_a77_1800714_wa
 #endif
 
+#if ERRATA_A77_1925769
+	mov	x0, x18
+	bl	errata_a77_1925769_wa
+#endif
+
 	ret	x19
 endfunc cortex_a77_reset_func
 
@@ -169,6 +203,7 @@ func cortex_a77_errata_report
 	 */
 	report_errata ERRATA_A77_1508412, cortex_a77, 1508412
 	report_errata ERRATA_A77_1800714, cortex_a77, 1800714
+	report_errata ERRATA_A77_1925769, cortex_a77, 1925769
 
 	ldp	x8, x30, [sp], #16
 	ret

lib/cpus/cpu-ops.mk

@@ -290,6 +290,10 @@ ERRATA_A77_1508412	?=0
 # only to revision <= r1p1 of the Cortex A77 cpu.
 ERRATA_A77_1800714	?=0
 
+# Flag to apply erratum 1925769 workaround during reset. This erratum applies
+# only to revision <= r1p1 of the Cortex A77 cpu.
+ERRATA_A77_1925769	?=0
+
 # Flag to apply erratum 1688305 workaround during reset. This erratum applies
 # to revisions r0p0 - r1p0 of the A78 cpu.
 ERRATA_A78_1688305	?=0
@@ -571,6 +575,10 @@ $(eval $(call add_define,ERRATA_A77_1508412))
 $(eval $(call assert_boolean,ERRATA_A77_1800714))
 $(eval $(call add_define,ERRATA_A77_1800714))
 
+# Process ERRATA_A77_1925769 flag
+$(eval $(call assert_boolean,ERRATA_A77_1925769))
+$(eval $(call add_define,ERRATA_A77_1925769))
+
 # Process ERRATA_A78_1688305 flag
 $(eval $(call assert_boolean,ERRATA_A78_1688305))
 $(eval $(call add_define,ERRATA_A78_1688305))