mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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Add GICv3 ITS to FDTs
- The interrupt addresses need to be updated to work. Change-Id: Icdd00177095ae9e4eb7b13718762f92e29b1465c
This commit is contained in:
Harry Liebel
Dan Handley
parent
30affd563a
commit
3498859bd4
4 changed files with 109 additions and 91 deletions
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@ -121,16 +121,25 @@
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*/
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*/
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};
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};
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gic: interrupt-controller@2cf00000 {
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gic: interrupt-controller@2f000000 {
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compatible = "arm,gic-v3";
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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#interrupt-cells = <3>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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interrupt-controller;
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interrupt-controller;
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reg = <0x0 0x2f000000 0 0x10000>, // GICD
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reg = <0x0 0x2f000000 0 0x10000>, // GICD
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<0x0 0x2f100000 0 0x200000>, // GICR
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<0x0 0x2f100000 0 0x200000>, // GICR
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<0x0 0x2c000000 0 0x2000>, // GICC
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<0x0 0x2c000000 0 0x2000>, // GICC
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<0x0 0x2c010000 0 0x2000>, // GICH
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<0x0 0x2c010000 0 0x2000>, // GICH
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<0x0 0x2c02F000 0 0x2000>; // GICV
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<0x0 0x2c02f000 0 0x2000>; // GICV
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interrupts = <1 9 4>;
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interrupts = <1 9 4>;
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its: its@2f020000 {
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compatible = "arm,gic-v3-its";
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msi-controller;
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reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
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};
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};
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};
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timer {
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timer {
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@ -178,49 +187,49 @@
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#interrupt-cells = <1>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 63>;
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interrupt-map-mask = <0 0 63>;
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interrupt-map = <0 0 0 &gic 0 0 4>,
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interrupt-map = <0 0 0 &gic 0 0 0 0 4>,
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<0 0 1 &gic 0 1 4>,
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<0 0 1 &gic 0 0 0 1 4>,
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<0 0 2 &gic 0 2 4>,
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<0 0 2 &gic 0 0 0 2 4>,
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<0 0 3 &gic 0 3 4>,
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<0 0 3 &gic 0 0 0 3 4>,
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<0 0 4 &gic 0 4 4>,
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<0 0 4 &gic 0 0 0 4 4>,
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<0 0 5 &gic 0 5 4>,
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<0 0 5 &gic 0 0 0 5 4>,
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<0 0 6 &gic 0 6 4>,
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<0 0 6 &gic 0 0 0 6 4>,
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<0 0 7 &gic 0 7 4>,
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<0 0 7 &gic 0 0 0 7 4>,
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<0 0 8 &gic 0 8 4>,
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<0 0 8 &gic 0 0 0 8 4>,
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<0 0 9 &gic 0 9 4>,
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<0 0 9 &gic 0 0 0 9 4>,
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<0 0 10 &gic 0 10 4>,
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<0 0 10 &gic 0 0 0 10 4>,
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<0 0 11 &gic 0 11 4>,
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<0 0 11 &gic 0 0 0 11 4>,
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<0 0 12 &gic 0 12 4>,
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<0 0 12 &gic 0 0 0 12 4>,
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<0 0 13 &gic 0 13 4>,
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<0 0 13 &gic 0 0 0 13 4>,
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<0 0 14 &gic 0 14 4>,
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<0 0 14 &gic 0 0 0 14 4>,
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<0 0 15 &gic 0 15 4>,
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<0 0 15 &gic 0 0 0 15 4>,
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<0 0 16 &gic 0 16 4>,
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<0 0 16 &gic 0 0 0 16 4>,
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<0 0 17 &gic 0 17 4>,
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<0 0 17 &gic 0 0 0 17 4>,
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<0 0 18 &gic 0 18 4>,
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<0 0 18 &gic 0 0 0 18 4>,
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<0 0 19 &gic 0 19 4>,
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<0 0 19 &gic 0 0 0 19 4>,
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<0 0 20 &gic 0 20 4>,
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<0 0 20 &gic 0 0 0 20 4>,
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<0 0 21 &gic 0 21 4>,
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<0 0 21 &gic 0 0 0 21 4>,
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<0 0 22 &gic 0 22 4>,
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<0 0 22 &gic 0 0 0 22 4>,
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<0 0 23 &gic 0 23 4>,
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<0 0 23 &gic 0 0 0 23 4>,
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<0 0 24 &gic 0 24 4>,
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<0 0 24 &gic 0 0 0 24 4>,
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<0 0 25 &gic 0 25 4>,
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<0 0 25 &gic 0 0 0 25 4>,
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<0 0 26 &gic 0 26 4>,
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<0 0 26 &gic 0 0 0 26 4>,
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<0 0 27 &gic 0 27 4>,
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<0 0 27 &gic 0 0 0 27 4>,
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<0 0 28 &gic 0 28 4>,
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<0 0 28 &gic 0 0 0 28 4>,
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<0 0 29 &gic 0 29 4>,
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<0 0 29 &gic 0 0 0 29 4>,
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<0 0 30 &gic 0 30 4>,
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<0 0 30 &gic 0 0 0 30 4>,
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<0 0 31 &gic 0 31 4>,
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<0 0 31 &gic 0 0 0 31 4>,
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<0 0 32 &gic 0 32 4>,
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<0 0 32 &gic 0 0 0 32 4>,
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<0 0 33 &gic 0 33 4>,
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<0 0 33 &gic 0 0 0 33 4>,
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<0 0 34 &gic 0 34 4>,
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<0 0 34 &gic 0 0 0 34 4>,
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<0 0 35 &gic 0 35 4>,
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<0 0 35 &gic 0 0 0 35 4>,
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<0 0 36 &gic 0 36 4>,
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<0 0 36 &gic 0 0 0 36 4>,
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<0 0 37 &gic 0 37 4>,
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<0 0 37 &gic 0 0 0 37 4>,
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<0 0 38 &gic 0 38 4>,
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<0 0 38 &gic 0 0 0 38 4>,
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<0 0 39 &gic 0 39 4>,
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<0 0 39 &gic 0 0 0 39 4>,
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<0 0 40 &gic 0 40 4>,
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<0 0 40 &gic 0 0 0 40 4>,
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<0 0 41 &gic 0 41 4>,
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<0 0 41 &gic 0 0 0 41 4>,
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<0 0 42 &gic 0 42 4>;
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<0 0 42 &gic 0 0 0 42 4>;
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/include/ "rtsm_ve-motherboard.dtsi"
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/include/ "rtsm_ve-motherboard.dtsi"
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};
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};
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@ -11,7 +11,7 @@
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* this list of conditions and the following disclaimer in the documentation
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* and/or other materials provided with the distribution.
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*
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*
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* Neither the name of the ARM nor the names of its contributors may be used
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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* prior written permission.
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*
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*
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@ -95,16 +95,25 @@
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<0x00000008 0x80000000 0 0x80000000>;
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<0x00000008 0x80000000 0 0x80000000>;
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};
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};
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gic: interrupt-controller@2cf00000 {
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gic: interrupt-controller@2f000000 {
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compatible = "arm,gic-v3";
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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#interrupt-cells = <3>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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interrupt-controller;
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interrupt-controller;
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reg = <0x0 0x2f000000 0 0x10000>, // GICD
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reg = <0x0 0x2f000000 0 0x10000>, // GICD
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<0x0 0x2f100000 0 0x200000>, // GICR
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<0x0 0x2f100000 0 0x200000>, // GICR
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<0x0 0x2c000000 0 0x2000>, // GICC
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<0x0 0x2c000000 0 0x2000>, // GICC
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<0x0 0x2c010000 0 0x2000>, // GICH
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<0x0 0x2c010000 0 0x2000>, // GICH
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<0x0 0x2c02F000 0 0x2000>; // GICV
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<0x0 0x2c02f000 0 0x2000>; // GICV
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interrupts = <1 9 4>;
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interrupts = <1 9 4>;
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its: its@2f020000 {
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compatible = "arm,gic-v3-its";
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msi-controller;
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reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
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};
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};
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};
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timer {
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timer {
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@ -152,49 +161,49 @@
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#interrupt-cells = <1>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 63>;
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interrupt-map-mask = <0 0 63>;
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interrupt-map = <0 0 0 &gic 0 0 4>,
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interrupt-map = <0 0 0 &gic 0 0 0 0 4>,
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<0 0 1 &gic 0 1 4>,
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<0 0 1 &gic 0 0 0 1 4>,
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<0 0 2 &gic 0 2 4>,
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<0 0 2 &gic 0 0 0 2 4>,
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<0 0 3 &gic 0 3 4>,
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<0 0 3 &gic 0 0 0 3 4>,
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<0 0 4 &gic 0 4 4>,
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<0 0 4 &gic 0 0 0 4 4>,
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<0 0 5 &gic 0 5 4>,
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<0 0 5 &gic 0 0 0 5 4>,
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<0 0 6 &gic 0 6 4>,
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<0 0 6 &gic 0 0 0 6 4>,
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<0 0 7 &gic 0 7 4>,
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<0 0 7 &gic 0 0 0 7 4>,
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<0 0 8 &gic 0 8 4>,
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<0 0 8 &gic 0 0 0 8 4>,
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<0 0 9 &gic 0 9 4>,
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<0 0 9 &gic 0 0 0 9 4>,
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<0 0 10 &gic 0 10 4>,
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<0 0 10 &gic 0 0 0 10 4>,
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<0 0 11 &gic 0 11 4>,
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<0 0 11 &gic 0 0 0 11 4>,
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<0 0 12 &gic 0 12 4>,
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<0 0 12 &gic 0 0 0 12 4>,
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<0 0 13 &gic 0 13 4>,
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<0 0 13 &gic 0 0 0 13 4>,
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<0 0 14 &gic 0 14 4>,
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<0 0 14 &gic 0 0 0 14 4>,
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<0 0 15 &gic 0 15 4>,
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<0 0 15 &gic 0 0 0 15 4>,
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<0 0 16 &gic 0 16 4>,
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<0 0 16 &gic 0 0 0 16 4>,
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<0 0 17 &gic 0 17 4>,
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<0 0 17 &gic 0 0 0 17 4>,
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<0 0 18 &gic 0 18 4>,
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<0 0 18 &gic 0 0 0 18 4>,
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<0 0 19 &gic 0 19 4>,
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<0 0 19 &gic 0 0 0 19 4>,
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<0 0 20 &gic 0 20 4>,
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<0 0 20 &gic 0 0 0 20 4>,
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<0 0 21 &gic 0 21 4>,
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<0 0 21 &gic 0 0 0 21 4>,
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<0 0 22 &gic 0 22 4>,
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<0 0 22 &gic 0 0 0 22 4>,
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<0 0 23 &gic 0 23 4>,
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<0 0 23 &gic 0 0 0 23 4>,
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<0 0 24 &gic 0 24 4>,
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<0 0 24 &gic 0 0 0 24 4>,
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<0 0 25 &gic 0 25 4>,
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<0 0 25 &gic 0 0 0 25 4>,
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<0 0 26 &gic 0 26 4>,
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<0 0 26 &gic 0 0 0 26 4>,
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<0 0 27 &gic 0 27 4>,
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<0 0 27 &gic 0 0 0 27 4>,
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<0 0 28 &gic 0 28 4>,
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<0 0 28 &gic 0 0 0 28 4>,
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<0 0 29 &gic 0 29 4>,
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<0 0 29 &gic 0 0 0 29 4>,
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<0 0 30 &gic 0 30 4>,
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<0 0 30 &gic 0 0 0 30 4>,
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<0 0 31 &gic 0 31 4>,
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<0 0 31 &gic 0 0 0 31 4>,
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<0 0 32 &gic 0 32 4>,
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<0 0 32 &gic 0 0 0 32 4>,
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<0 0 33 &gic 0 33 4>,
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<0 0 33 &gic 0 0 0 33 4>,
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<0 0 34 &gic 0 34 4>,
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<0 0 34 &gic 0 0 0 34 4>,
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<0 0 35 &gic 0 35 4>,
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<0 0 35 &gic 0 0 0 35 4>,
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<0 0 36 &gic 0 36 4>,
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<0 0 36 &gic 0 0 0 36 4>,
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<0 0 37 &gic 0 37 4>,
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<0 0 37 &gic 0 0 0 37 4>,
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<0 0 38 &gic 0 38 4>,
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<0 0 38 &gic 0 0 0 38 4>,
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<0 0 39 &gic 0 39 4>,
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<0 0 39 &gic 0 0 0 39 4>,
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<0 0 40 &gic 0 40 4>,
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<0 0 40 &gic 0 0 0 40 4>,
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<0 0 41 &gic 0 41 4>,
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<0 0 41 &gic 0 0 0 41 4>,
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<0 0 42 &gic 0 42 4>;
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<0 0 42 &gic 0 0 0 42 4>;
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/include/ "fvp-foundation-motherboard.dtsi"
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/include/ "fvp-foundation-motherboard.dtsi"
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};
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};
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