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Replace some memset call by zeromem

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Replace all use of memset by zeromem when zeroing moderately-sized
structure by applying the following transformation:
memset(x, 0, sizeof(x)) => zeromem(x, sizeof(x))

As the Trusted Firmware is compiled with -ffreestanding, it forbids the
compiler from using __builtin_memset and forces it to generate calls to
the slow memset implementation. Zeromem is a near drop in replacement
for this use case, with a more efficient implementation on both AArch32
and AArch64.

Change-Id: Ia7f3a90e888b96d056881be09f0b4d65b41aa79e
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
This commit is contained in:
Douglas Raillard 2017-01-26 15:54:44 +00:00
parent 308d359b26
commit 32f0d3c6c3
18 changed files with 76 additions and 58 deletions
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5
bl32/sp_min/sp_min_main.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -45,6 +45,7 @@
#include <stdint.h>
#include <string.h>
#include <types.h>
#include <utils.h>
#include "sp_min_private.h"
/* Pointers to per-core cpu contexts */
@ -203,7 +204,7 @@ void sp_min_warm_boot(void)
smc_set_next_ctx(NON_SECURE);
next_smc_ctx = smc_get_next_ctx();
memset(next_smc_ctx, 0, sizeof(smc_ctx_t));
zeromem(next_smc_ctx, sizeof(smc_ctx_t));
copy_cpu_ctx_to_smc_stx(get_regs_ctx(cm_get_context(NON_SECURE)),
next_smc_ctx);

5
drivers/auth/mbedtls/mbedtls_x509_parser.c
View file

@ -43,6 +43,7 @@
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include <utils.h>
/* mbed TLS headers */
#include <mbedtls/asn1.h>
@ -71,7 +72,7 @@ static void clear_temp_vars(void)
{
#define ZERO_AND_CLEAN(x) \
do { \
memset(&x, 0, sizeof(x)); \
zeromem(&x, sizeof(x)); \
clean_dcache_range((uintptr_t)&x, sizeof(x)); \
} while (0);
@ -111,7 +112,7 @@ static int get_ext(const char *oid, void **ext, unsigned int *ext_len)
MBEDTLS_ASN1_SEQUENCE);
while (p < end) {
memset(&extn_oid, 0x0, sizeof(extn_oid));
zeromem(&extn_oid, sizeof(extn_oid));
is_critical = 0; /* DEFAULT FALSE */
mbedtls_asn1_get_tag(&p, end, &len, MBEDTLS_ASN1_CONSTRUCTED |

39
drivers/emmc/emmc.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -36,6 +36,7 @@
#include <emmc.h>
#include <errno.h>
#include <string.h>
#include <utils.h>
static const emmc_ops_t *ops;
static unsigned int emmc_ocr_value;
@ -53,7 +54,7 @@ static int emmc_device_state(void)
int ret;
do {
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD13;
cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET;
cmd.resp_type = EMMC_RESPONSE_R1;
@ -71,7 +72,7 @@ static void emmc_set_ext_csd(unsigned int ext_cmd, unsigned int value)
emmc_cmd_t cmd;
int ret, state;
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD6;
cmd.cmd_arg = EXTCSD_WRITE_BYTES | EXTCSD_CMD(ext_cmd) |
EXTCSD_VALUE(value) | 1;
@ -107,14 +108,14 @@ static int emmc_enumerate(int clk, int bus_width)
ops->init();
/* CMD0: reset to IDLE */
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD0;
ret = ops->send_cmd(&cmd);
assert(ret == 0);
while (1) {
/* CMD1: get OCR register */
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD1;
cmd.cmd_arg = OCR_SECTOR_MODE | OCR_VDD_MIN_2V7 |
OCR_VDD_MIN_1V7;
@ -127,14 +128,14 @@ static int emmc_enumerate(int clk, int bus_width)
}
/* CMD2: Card Identification */
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD2;
cmd.resp_type = EMMC_RESPONSE_R2;
ret = ops->send_cmd(&cmd);
assert(ret == 0);
/* CMD3: Set Relative Address */
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD3;
cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET;
cmd.resp_type = EMMC_RESPONSE_R1;
@ -142,7 +143,7 @@ static int emmc_enumerate(int clk, int bus_width)
assert(ret == 0);
/* CMD9: CSD Register */
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD9;
cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET;
cmd.resp_type = EMMC_RESPONSE_R2;
@ -151,7 +152,7 @@ static int emmc_enumerate(int clk, int bus_width)
memcpy(&emmc_csd, &cmd.resp_data, sizeof(cmd.resp_data));
/* CMD7: Select Card */
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD7;
cmd.cmd_arg = EMMC_FIX_RCA << RCA_SHIFT_OFFSET;
cmd.resp_type = EMMC_RESPONSE_R1;
@ -181,7 +182,7 @@ size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size)
assert(ret == 0);
if (is_cmd23_enabled()) {
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
/* set block count */
cmd.cmd_idx = EMMC_CMD23;
cmd.cmd_arg = size / EMMC_BLOCK_SIZE;
@ -189,7 +190,7 @@ size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size)
ret = ops->send_cmd(&cmd);
assert(ret == 0);
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD18;
} else {
if (size > EMMC_BLOCK_SIZE)
@ -213,7 +214,7 @@ size_t emmc_read_blocks(int lba, uintptr_t buf, size_t size)
if (is_cmd23_enabled() == 0) {
if (size > EMMC_BLOCK_SIZE) {
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD12;
ret = ops->send_cmd(&cmd);
assert(ret == 0);
@ -240,17 +241,17 @@ size_t emmc_write_blocks(int lba, const uintptr_t buf, size_t size)
if (is_cmd23_enabled()) {
/* set block count */
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD23;
cmd.cmd_arg = size / EMMC_BLOCK_SIZE;
cmd.resp_type = EMMC_RESPONSE_R1;
ret = ops->send_cmd(&cmd);
assert(ret == 0);
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD25;
} else {
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
if (size > EMMC_BLOCK_SIZE)
cmd.cmd_idx = EMMC_CMD25;
else
@ -272,7 +273,7 @@ size_t emmc_write_blocks(int lba, const uintptr_t buf, size_t size)
if (is_cmd23_enabled() == 0) {
if (size > EMMC_BLOCK_SIZE) {
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD12;
ret = ops->send_cmd(&cmd);
assert(ret == 0);
@ -291,21 +292,21 @@ size_t emmc_erase_blocks(int lba, size_t size)
assert(ops != 0);
assert((size != 0) && ((size % EMMC_BLOCK_SIZE) == 0));
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD35;
cmd.cmd_arg = lba;
cmd.resp_type = EMMC_RESPONSE_R1;
ret = ops->send_cmd(&cmd);
assert(ret == 0);
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD36;
cmd.cmd_arg = lba + (size / EMMC_BLOCK_SIZE) - 1;
cmd.resp_type = EMMC_RESPONSE_R1;
ret = ops->send_cmd(&cmd);
assert(ret == 0);
memset(&cmd, 0, sizeof(emmc_cmd_t));
zeromem(&cmd, sizeof(emmc_cmd_t));
cmd.cmd_idx = EMMC_CMD38;
cmd.resp_type = EMMC_RESPONSE_R1B;
ret = ops->send_cmd(&cmd);

7
drivers/io/io_block.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -36,6 +36,7 @@
#include <io_storage.h>
#include <platform_def.h>
#include <string.h>
#include <utils.h>
typedef struct {
io_block_dev_spec_t *dev_spec;
@ -135,8 +136,8 @@ static int free_dev_info(io_dev_info_t *dev_info)
result = find_first_block_state(state->dev_spec, &index);
if (result == 0) {
/* free if device info is valid */
memset(state, 0, sizeof(block_dev_state_t));
memset(dev_info, 0, sizeof(io_dev_info_t));
zeromem(state, sizeof(block_dev_state_t));
zeromem(dev_info, sizeof(io_dev_info_t));
--block_dev_count;
}

5
drivers/io/io_fip.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -40,6 +40,7 @@
#include <platform_def.h>
#include <stdint.h>
#include <string.h>
#include <utils.h>
#include <uuid.h>
/* Useful for printing UUIDs when debugging.*/
@ -351,7 +352,7 @@ static int fip_file_close(io_entity_t *entity)
* If we had malloc() we would free() here.
*/
if (current_file.entry.offset_address != 0) {
memset(&current_file, 0, sizeof(current_file));
zeromem(&current_file, sizeof(current_file));
}
/* Clear the Entity info. */

5
drivers/io/io_memmap.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -33,6 +33,7 @@
#include <io_driver.h>
#include <io_storage.h>
#include <string.h>
#include <utils.h>
/* As we need to be able to keep state for seek, only one file can be open
* at a time. Make this a structure and point to the entity->info. When we
@ -231,7 +232,7 @@ static int memmap_block_close(io_entity_t *entity)
entity->info = 0;
/* This would be a mem free() if we had malloc.*/
memset((void *)&current_file, 0, sizeof(current_file));
zeromem((void *)&current_file, sizeof(current_file));
return 0;
}

5
drivers/partition/gpt.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -33,6 +33,7 @@
#include <errno.h>
#include <gpt.h>
#include <string.h>
#include <utils.h>
static int unicode_to_ascii(unsigned short *str_in, unsigned char *str_out)
{
@ -65,7 +66,7 @@ int parse_gpt_entry(gpt_entry_t *gpt_entry, partition_entry_t *entry)
return -EINVAL;
}
memset(entry, 0, sizeof(partition_entry_t));
zeromem(entry, sizeof(partition_entry_t));
result = unicode_to_ascii(gpt_entry->name, (uint8_t *)entry->name);
if (result != 0) {
return result;

5
lib/el3_runtime/aarch32/context_mgmt.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -38,6 +38,7 @@
#include <platform_def.h>
#include <smcc_helpers.h>
#include <string.h>
#include <utils.h>
/*******************************************************************************
* Context management library initialisation routine. This library is used by
@ -84,7 +85,7 @@ static void cm_init_context_common(cpu_context_t *ctx, const entry_point_info_t
security_state = GET_SECURITY_STATE(ep->h.attr);
/* Clear any residual register values from the context */
memset(ctx, 0, sizeof(*ctx));
zeromem(ctx, sizeof(*ctx));
reg_ctx = get_regs_ctx(ctx);

5
lib/el3_runtime/aarch64/context_mgmt.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -39,6 +39,7 @@
#include <platform_def.h>
#include <smcc_helpers.h>
#include <string.h>
#include <utils.h>
/*******************************************************************************
@ -91,7 +92,7 @@ static void cm_init_context_common(cpu_context_t *ctx, const entry_point_info_t
security_state = GET_SECURITY_STATE(ep->h.attr);
/* Clear any residual register values from the context */
memset(ctx, 0, sizeof(*ctx));
zeromem(ctx, sizeof(*ctx));
/*
* Base the context SCR on the current value, adjust for entry point

9
lib/psci/psci_common.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -37,6 +37,7 @@
#include <debug.h>
#include <platform.h>
#include <string.h>
#include <utils.h>
#include "psci_private.h"
/*
@ -622,7 +623,7 @@ static int psci_get_ns_ep_info(entry_point_info_t *ep,
SET_PARAM_HEAD(ep, PARAM_EP, VERSION_1, ep_attr);
ep->pc = entrypoint;
memset(&ep->args, 0, sizeof(ep->args));
zeromem(&ep->args, sizeof(ep->args));
ep->args.arg0 = context_id;
mode = scr & SCR_HCE_BIT ? MODE32_hyp : MODE32_svc;
@ -659,7 +660,7 @@ static int psci_get_ns_ep_info(entry_point_info_t *ep,
SET_PARAM_HEAD(ep, PARAM_EP, VERSION_1, ep_attr);
ep->pc = entrypoint;
memset(&ep->args, 0, sizeof(ep->args));
zeromem(&ep->args, sizeof(ep->args));
ep->args.arg0 = context_id;
/*
@ -957,7 +958,7 @@ unsigned int psci_get_max_phys_off_afflvl(void)
{
psci_power_state_t state_info;
memset(&state_info, 0, sizeof(state_info));
zeromem(&state_info, sizeof(state_info));
psci_get_target_local_pwr_states(PLAT_MAX_PWR_LVL, &state_info);
return psci_find_target_suspend_lvl(&state_info);

5
plat/arm/common/arm_bl2_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -38,6 +38,7 @@
#include <plat_arm.h>
#include <platform_def.h>
#include <string.h>
#include <utils.h>
/* Data structure which holds the extents of the trusted SRAM for BL2 */
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
@ -123,7 +124,7 @@ bl31_params_t *bl2_plat_get_bl31_params(void)
* Initialise the memory for all the arguments that needs to
* be passed to BL31
*/
memset(&bl31_params_mem, 0, sizeof(bl2_to_bl31_params_mem_t));
zeromem(&bl31_params_mem, sizeof(bl2_to_bl31_params_mem_t));
/* Assign memory for TF related information */
bl2_to_bl31_params = &bl31_params_mem.bl31_params;

6
plat/arm/css/drivers/scpi/css_scpi.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -34,6 +34,7 @@
#include <debug.h>
#include <platform.h>
#include <string.h>
#include <utils.h>
#include "css_mhu.h"
#include "css_scpi.h"
@ -204,7 +205,8 @@ int scpi_get_css_power_state(unsigned int mpidr, unsigned int *cpu_state_p,
scpi_secure_message_start();
/* Populate request headers */
cmd = memset(SCPI_CMD_HEADER_AP_TO_SCP, 0, sizeof(*cmd));
zeromem(SCPI_CMD_HEADER_AP_TO_SCP, sizeof(*cmd));
cmd = SCPI_CMD_HEADER_AP_TO_SCP;
cmd->id = SCPI_CMD_GET_CSS_POWER_STATE;
/*

1
plat/nvidia/tegra/common/drivers/memctrl/memctrl.c
View file

@ -35,6 +35,7 @@
#include <memctrl.h>
#include <string.h>
#include <tegra_def.h>
#include <utils.h>
#include <xlat_tables.h>
#define TEGRA_GPU_RESET_REG_OFFSET 0x28c

6
plat/qemu/qemu_bl2_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -35,7 +35,7 @@
#include <platform_def.h>
#include "qemu_private.h"
#include <string.h>
#include <utils.h>
/*
* The next 2 constants identify the extents of the code & RO data region.
@ -91,7 +91,7 @@ bl31_params_t *bl2_plat_get_bl31_params(void)
* Initialise the memory for all the arguments that needs to
* be passed to BL3-1
*/
memset(&bl31_params_mem, 0, sizeof(bl2_to_bl31_params_mem_t));
zeromem(&bl31_params_mem, sizeof(bl2_to_bl31_params_mem_t));
/* Assign memory for TF related information */
bl2_to_bl31_params = &bl31_params_mem.bl31_params;

11
plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -31,6 +31,7 @@
#include <string.h>
#include <stdint.h>
#include <dram.h>
#include <utils.h>
#include "dram_spec_timing.h"
static const uint8_t ddr3_cl_cwl[][7] = {
@ -228,7 +229,7 @@ static void ddr3_get_parameter(struct timing_related_config *timing_config,
uint32_t ddr_capability_per_die = get_max_die_capability(timing_config);
uint32_t tmp;
memset((void *)pdram_timing, 0, sizeof(struct dram_timing_t));
zeromem((void *)pdram_timing, sizeof(struct dram_timing_t));
pdram_timing->mhz = nmhz;
pdram_timing->al = 0;
pdram_timing->bl = timing_config->bl;
@ -441,7 +442,7 @@ static void lpddr2_get_parameter(struct timing_related_config *timing_config,
uint32_t ddr_capability_per_die = get_max_die_capability(timing_config);
uint32_t tmp, trp_tmp, trppb_tmp, tras_tmp, twr_tmp, bl_tmp;
memset((void *)pdram_timing, 0, sizeof(struct dram_timing_t));
zeromem((void *)pdram_timing, sizeof(struct dram_timing_t));
pdram_timing->mhz = nmhz;
pdram_timing->al = 0;
pdram_timing->bl = timing_config->bl;
@ -678,7 +679,7 @@ static void lpddr3_get_parameter(struct timing_related_config *timing_config,
uint32_t ddr_capability_per_die = get_max_die_capability(timing_config);
uint32_t tmp, trp_tmp, trppb_tmp, tras_tmp, twr_tmp, bl_tmp;
memset((void *)pdram_timing, 0, sizeof(struct dram_timing_t));
zeromem((void *)pdram_timing, sizeof(struct dram_timing_t));
pdram_timing->mhz = nmhz;
pdram_timing->al = 0;
pdram_timing->bl = timing_config->bl;
@ -968,7 +969,7 @@ static void lpddr4_get_parameter(struct timing_related_config *timing_config,
uint32_t ddr_capability_per_die = get_max_die_capability(timing_config);
uint32_t tmp, trp_tmp, trppb_tmp, tras_tmp;
memset((void *)pdram_timing, 0, sizeof(struct dram_timing_t));
zeromem((void *)pdram_timing, sizeof(struct dram_timing_t));
pdram_timing->mhz = nmhz;
pdram_timing->al = 0;
pdram_timing->bl = timing_config->bl;

5
plat/xilinx/zynqmp/pm_service/pm_client.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -40,6 +40,7 @@
#include <bl_common.h>
#include <mmio.h>
#include <string.h>
#include <utils.h>
#include "pm_api_sys.h"
#include "pm_client.h"
#include "pm_ipi.h"
@ -188,7 +189,7 @@ static void pm_client_set_wakeup_sources(void)
uint8_t pm_wakeup_nodes_set[NODE_MAX];
uintptr_t isenabler1 = BASE_GICD_BASE + GICD_ISENABLER + 4;
memset(&pm_wakeup_nodes_set, 0, sizeof(pm_wakeup_nodes_set));
zeromem(&pm_wakeup_nodes_set, sizeof(pm_wakeup_nodes_set));
for (reg_num = 0; reg_num < NUM_GICD_ISENABLER; reg_num++) {
uint32_t base_irq = reg_num << ISENABLER_SHIFT;

5
services/spd/opteed/opteed_common.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -33,6 +33,7 @@
#include <bl_common.h>
#include <context_mgmt.h>
#include <string.h>
#include <utils.h>
#include "opteed_private.h"
/*******************************************************************************
@ -73,7 +74,7 @@ void opteed_init_optee_ep_state(struct entry_point_info *optee_entry_point,
DAIF_FIQ_BIT |
DAIF_IRQ_BIT |
DAIF_ABT_BIT);
memset(&optee_entry_point->args, 0, sizeof(optee_entry_point->args));
zeromem(&optee_entry_point->args, sizeof(optee_entry_point->args));
}
/*******************************************************************************

5
services/spd/tspd/tspd_common.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -35,6 +35,7 @@
#include <debug.h>
#include <string.h>
#include <tsp.h>
#include <utils.h>
#include "tspd_private.h"
/*******************************************************************************
@ -78,7 +79,7 @@ void tspd_init_tsp_ep_state(struct entry_point_info *tsp_entry_point,
tsp_entry_point->spsr = SPSR_64(MODE_EL1,
MODE_SP_ELX,
DISABLE_ALL_EXCEPTIONS);
memset(&tsp_entry_point->args, 0, sizeof(tsp_entry_point->args));
zeromem(&tsp_entry_point->args, sizeof(tsp_entry_point->args));
}
/*******************************************************************************