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refactor(amu): detect auxiliary counters at runtime
This change decouples the group 1 counter macros to facilitate dynamic detection at runtime. These counters remain disabled - we will add dynamic enablement of them in a later patch. Change-Id: I820d05f228d440643bdfa308d030bd51ebc0b35a Signed-off-by: Chris Kay <chris.kay@arm.com>
This commit is contained in:
Chris Kay
parent
81e2ff1f36
commit
31d3cc2570
3 changed files with 27 additions and 145 deletions
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@ -16,48 +16,10 @@
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#include <platform_def.h>
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#define AMU_GROUP0_MAX_COUNTERS U(16)
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#define AMU_GROUP1_MAX_COUNTERS U(16)
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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#define AMU_GROUP1_COUNTERS_MASK U(0)
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/* Calculate number of group 1 counters */
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#if (AMU_GROUP1_COUNTERS_MASK & (1 << 15))
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#define AMU_GROUP1_NR_COUNTERS 16U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 14))
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#define AMU_GROUP1_NR_COUNTERS 15U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 13))
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#define AMU_GROUP1_NR_COUNTERS 14U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 12))
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#define AMU_GROUP1_NR_COUNTERS 13U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 11))
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#define AMU_GROUP1_NR_COUNTERS 12U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 10))
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#define AMU_GROUP1_NR_COUNTERS 11U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 9))
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#define AMU_GROUP1_NR_COUNTERS 10U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 8))
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#define AMU_GROUP1_NR_COUNTERS 9U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 7))
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#define AMU_GROUP1_NR_COUNTERS 8U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 6))
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#define AMU_GROUP1_NR_COUNTERS 7U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 5))
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#define AMU_GROUP1_NR_COUNTERS 6U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 4))
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#define AMU_GROUP1_NR_COUNTERS 5U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 3))
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#define AMU_GROUP1_NR_COUNTERS 4U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 2))
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#define AMU_GROUP1_NR_COUNTERS 3U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 1))
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#define AMU_GROUP1_NR_COUNTERS 2U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 0))
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#define AMU_GROUP1_NR_COUNTERS 1U
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#else
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#define AMU_GROUP1_NR_COUNTERS 0U
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#endif
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CASSERT(AMU_GROUP1_COUNTERS_MASK <= 0xffff, invalid_amu_group1_counters_mask);
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#endif
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struct amu_ctx {
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@ -68,9 +30,9 @@ struct amu_ctx {
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#endif
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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uint64_t group1_cnts[AMU_GROUP1_NR_COUNTERS];
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uint64_t group1_cnts[AMU_GROUP1_MAX_COUNTERS];
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#if __aarch64__
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uint64_t group1_voffsets[AMU_GROUP1_NR_COUNTERS];
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uint64_t group1_voffsets[AMU_GROUP1_MAX_COUNTERS];
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#endif
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#endif
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};
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@ -136,30 +136,6 @@ void amu_enable(bool el2_unused)
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return;
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}
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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/* Check and set presence of group 1 counters */
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if (!amu_group1_supported()) {
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ERROR("AMU Counter Group 1 is not implemented\n");
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panic();
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}
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/* Check number of group 1 counters */
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uint32_t cnt_num = read_amcgcr_cg1nc();
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VERBOSE("%s%u. %s%u\n",
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"Number of AMU Group 1 Counters ", cnt_num,
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"Requested number ", AMU_GROUP1_NR_COUNTERS);
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if (cnt_num < AMU_GROUP1_NR_COUNTERS) {
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ERROR("%s%u is less than %s%u\n",
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"Number of AMU Group 1 Counters ", cnt_num,
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"Requested number ", AMU_GROUP1_NR_COUNTERS);
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panic();
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}
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}
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#endif
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if (el2_unused) {
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/*
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* Non-secure access from EL0 or EL1 to the Activity Monitor
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@ -172,7 +148,7 @@ void amu_enable(bool el2_unused)
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write_amcntenset0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U);
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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/* Enable group 1 counters */
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write_amcntenset1_px(AMU_GROUP1_COUNTERS_MASK);
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}
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@ -223,7 +199,7 @@ static uint64_t amu_group1_cnt_read(unsigned int idx)
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{
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assert(amu_supported());
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assert(amu_group1_supported());
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assert(idx < AMU_GROUP1_NR_COUNTERS);
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assert(idx < read_amcgcr_cg1nc());
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return amu_group1_cnt_read_internal(idx);
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}
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@ -233,7 +209,7 @@ static void amu_group1_cnt_write(unsigned int idx, uint64_t val)
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{
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assert(amu_supported());
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assert(amu_group1_supported());
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assert(idx < AMU_GROUP1_NR_COUNTERS);
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assert(idx < read_amcgcr_cg1nc());
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amu_group1_cnt_write_internal(idx, val);
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isb();
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@ -249,20 +225,12 @@ static void *amu_context_save(const void *arg)
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return (void *)-1;
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}
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (!amu_group1_supported()) {
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return (void *)-1;
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}
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}
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#endif
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/* Assert that group 0/1 counter configuration is what we expect */
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assert(read_amcntenset0_px() ==
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((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U));
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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assert(read_amcntenset1_px() == AMU_GROUP1_COUNTERS_MASK);
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}
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#endif
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@ -273,7 +241,7 @@ static void *amu_context_save(const void *arg)
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write_amcntenclr0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U);
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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write_amcntenclr1_px(AMU_GROUP1_COUNTERS_MASK);
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}
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#endif
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@ -286,9 +254,9 @@ static void *amu_context_save(const void *arg)
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}
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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/* Save group 1 counters */
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for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
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for (i = 0U; i < read_amcgcr_cg1nc(); i++) {
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if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) {
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ctx->group1_cnts[i] = amu_group1_cnt_read(i);
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}
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@ -308,19 +276,11 @@ static void *amu_context_restore(const void *arg)
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return (void *)-1;
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}
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (!amu_group1_supported()) {
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return (void *)-1;
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}
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}
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#endif
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/* Counters were disabled in `amu_context_save()` */
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assert(read_amcntenset0_px() == 0U);
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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assert(read_amcntenset1_px() == 0U);
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}
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#endif
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@ -334,9 +294,9 @@ static void *amu_context_restore(const void *arg)
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write_amcntenset0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U);
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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/* Restore group 1 counters */
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for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
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for (i = 0U; i < read_amcgcr_cg1nc(); i++) {
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if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) {
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amu_group1_cnt_write(i, ctx->group1_cnts[i]);
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}
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@ -163,30 +163,6 @@ void amu_enable(bool el2_unused, cpu_context_t *ctx)
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return;
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}
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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/* Check and set presence of group 1 counters */
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if (!amu_group1_supported()) {
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ERROR("AMU Counter Group 1 is not implemented\n");
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panic();
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}
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/* Check number of group 1 counters */
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uint64_t cnt_num = read_amcgcr_el0_cg1nc();
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VERBOSE("%s%llu. %s%u\n",
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"Number of AMU Group 1 Counters ", cnt_num,
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"Requested number ", AMU_GROUP1_NR_COUNTERS);
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if (cnt_num < AMU_GROUP1_NR_COUNTERS) {
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ERROR("%s%llu is less than %s%u\n",
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"Number of AMU Group 1 Counters ", cnt_num,
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"Requested number ", AMU_GROUP1_NR_COUNTERS);
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panic();
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}
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}
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#endif
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if (el2_unused) {
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/*
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* CPTR_EL2.TAM: Set to zero so any accesses to
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@ -206,7 +182,7 @@ void amu_enable(bool el2_unused, cpu_context_t *ctx)
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write_amcntenset0_el0_px((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U);
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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/* Enable group 1 counters */
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write_amcntenset1_el0_px(AMU_GROUP1_COUNTERS_MASK);
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}
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@ -293,7 +269,7 @@ static uint64_t amu_group1_cnt_read(unsigned int idx)
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{
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assert(amu_supported());
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assert(amu_group1_supported());
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assert(idx < AMU_GROUP1_NR_COUNTERS);
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assert(idx < read_amcgcr_el0_cg1nc());
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return amu_group1_cnt_read_internal(idx);
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}
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@ -303,7 +279,7 @@ static void amu_group1_cnt_write(unsigned int idx, uint64_t val)
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{
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assert(amu_supported());
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assert(amu_group1_supported());
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assert(idx < AMU_GROUP1_NR_COUNTERS);
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assert(idx < read_amcgcr_el0_cg1nc());
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amu_group1_cnt_write_internal(idx, val);
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isb();
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@ -318,7 +294,7 @@ static uint64_t amu_group1_voffset_read(unsigned int idx)
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{
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assert(amu_v1p1_supported());
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assert(amu_group1_supported());
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assert(idx < AMU_GROUP1_NR_COUNTERS);
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assert(idx < read_amcgcr_el0_cg1nc());
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assert((read_amcg1idr_el0_voff() & (UINT64_C(1) << idx)) != 0U);
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return amu_group1_voffset_read_internal(idx);
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@ -333,7 +309,7 @@ static void amu_group1_voffset_write(unsigned int idx, uint64_t val)
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{
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assert(amu_v1p1_supported());
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assert(amu_group1_supported());
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assert(idx < AMU_GROUP1_NR_COUNTERS);
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assert(idx < read_amcgcr_el0_cg1nc());
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assert((read_amcg1idr_el0_voff() & (UINT64_C(1) << idx)) != 0U);
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amu_group1_voffset_write_internal(idx, val);
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@ -350,20 +326,12 @@ static void *amu_context_save(const void *arg)
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return (void *)-1;
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}
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (!amu_group1_supported()) {
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return (void *)-1;
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}
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}
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#endif
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/* Assert that group 0/1 counter configuration is what we expect */
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assert(read_amcntenset0_el0_px() ==
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((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U));
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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assert(read_amcntenset1_el0_px() == AMU_GROUP1_COUNTERS_MASK);
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}
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#endif
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@ -375,7 +343,7 @@ static void *amu_context_save(const void *arg)
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write_amcntenclr0_el0_px((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U);
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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write_amcntenclr1_el0_px(AMU_GROUP1_COUNTERS_MASK);
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}
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#endif
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@ -396,9 +364,9 @@ static void *amu_context_save(const void *arg)
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}
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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/* Save group 1 counters */
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for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
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for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
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if ((AMU_GROUP1_COUNTERS_MASK & (1UL << i)) != 0U) {
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ctx->group1_cnts[i] = amu_group1_cnt_read(i);
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}
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@ -409,7 +377,7 @@ static void *amu_context_save(const void *arg)
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uint64_t amcg1idr = read_amcg1idr_el0_voff() &
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AMU_GROUP1_COUNTERS_MASK;
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for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
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for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
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if (((amcg1idr >> i) & 1ULL) != 0ULL) {
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ctx->group1_voffsets[i] =
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amu_group1_voffset_read(i);
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@ -431,19 +399,11 @@ static void *amu_context_restore(const void *arg)
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return (void *)-1;
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}
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (!amu_group1_supported()) {
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return (void *)-1;
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}
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}
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#endif
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/* Counters were disabled in `amu_context_save()` */
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assert(read_amcntenset0_el0_px() == 0U);
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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assert(read_amcntenset1_el0_px() == 0U);
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}
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#endif
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@ -465,9 +425,9 @@ static void *amu_context_restore(const void *arg)
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write_amcntenset0_el0_px((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U);
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#if ENABLE_AMU_AUXILIARY_COUNTERS
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if (AMU_GROUP1_NR_COUNTERS > 0U) {
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if (amu_group1_supported()) {
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/* Restore group 1 counters */
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for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
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for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
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if ((AMU_GROUP1_COUNTERS_MASK & (1UL << i)) != 0U) {
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amu_group1_cnt_write(i, ctx->group1_cnts[i]);
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}
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@ -478,7 +438,7 @@ static void *amu_context_restore(const void *arg)
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uint64_t amcg1idr = read_amcg1idr_el0_voff() &
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AMU_GROUP1_COUNTERS_MASK;
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for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
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for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
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if (((amcg1idr >> i) & 1ULL) != 0ULL) {
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amu_group1_voffset_write(i,
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ctx->group1_voffsets[i]);
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|||
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Reference in a new issue