refactor(amu): detect auxiliary counters at runtime

This change decouples the group 1 counter macros to facilitate dynamic
detection at runtime. These counters remain disabled - we will add
dynamic enablement of them in a later patch.

Change-Id: I820d05f228d440643bdfa308d030bd51ebc0b35a
Signed-off-by: Chris Kay <chris.kay@arm.com>

include/lib/extensions/amu_private.h

@@ -16,48 +16,10 @@
 #include <platform_def.h>
 
 #define AMU_GROUP0_MAX_COUNTERS		U(16)
+#define AMU_GROUP1_MAX_COUNTERS		U(16)
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
 #define AMU_GROUP1_COUNTERS_MASK	U(0)
-
-/* Calculate number of group 1 counters */
-#if (AMU_GROUP1_COUNTERS_MASK	& (1 << 15))
-#define	AMU_GROUP1_NR_COUNTERS		16U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 14))
-#define	AMU_GROUP1_NR_COUNTERS		15U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 13))
-#define	AMU_GROUP1_NR_COUNTERS		14U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 12))
-#define	AMU_GROUP1_NR_COUNTERS		13U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 11))
-#define	AMU_GROUP1_NR_COUNTERS		12U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 10))
-#define	AMU_GROUP1_NR_COUNTERS		11U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 9))
-#define	AMU_GROUP1_NR_COUNTERS		10U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 8))
-#define	AMU_GROUP1_NR_COUNTERS		9U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 7))
-#define	AMU_GROUP1_NR_COUNTERS		8U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 6))
-#define	AMU_GROUP1_NR_COUNTERS		7U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 5))
-#define	AMU_GROUP1_NR_COUNTERS		6U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 4))
-#define	AMU_GROUP1_NR_COUNTERS		5U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 3))
-#define	AMU_GROUP1_NR_COUNTERS		4U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 2))
-#define	AMU_GROUP1_NR_COUNTERS		3U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 1))
-#define	AMU_GROUP1_NR_COUNTERS		2U
-#elif (AMU_GROUP1_COUNTERS_MASK	& (1 << 0))
-#define	AMU_GROUP1_NR_COUNTERS		1U
-#else
-#define	AMU_GROUP1_NR_COUNTERS		0U
-#endif
-
-CASSERT(AMU_GROUP1_COUNTERS_MASK <= 0xffff, invalid_amu_group1_counters_mask);
 #endif
 
 struct amu_ctx {
@@ -68,9 +30,9 @@ struct amu_ctx {
 #endif
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	uint64_t group1_cnts[AMU_GROUP1_NR_COUNTERS];
+	uint64_t group1_cnts[AMU_GROUP1_MAX_COUNTERS];
 #if __aarch64__
-	uint64_t group1_voffsets[AMU_GROUP1_NR_COUNTERS];
+	uint64_t group1_voffsets[AMU_GROUP1_MAX_COUNTERS];
 #endif
 #endif
 };

lib/extensions/amu/aarch32/amu.c

@@ -136,30 +136,6 @@ void amu_enable(bool el2_unused)
 		return;
 	}
 
-#if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
-		/* Check and set presence of group 1 counters */
-		if (!amu_group1_supported()) {
-			ERROR("AMU Counter Group 1 is not implemented\n");
-			panic();
-		}
-
-		/* Check number of group 1 counters */
-		uint32_t cnt_num = read_amcgcr_cg1nc();
-
-		VERBOSE("%s%u. %s%u\n",
-			"Number of AMU Group 1 Counters ", cnt_num,
-			"Requested number ", AMU_GROUP1_NR_COUNTERS);
-
-		if (cnt_num < AMU_GROUP1_NR_COUNTERS) {
-			ERROR("%s%u is less than %s%u\n",
-			"Number of AMU Group 1 Counters ", cnt_num,
-			"Requested number ", AMU_GROUP1_NR_COUNTERS);
-			panic();
-		}
-	}
-#endif
-
 	if (el2_unused) {
 		/*
 		 * Non-secure access from EL0 or EL1 to the Activity Monitor
@@ -172,7 +148,7 @@ void amu_enable(bool el2_unused)
 	write_amcntenset0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		/* Enable group 1 counters */
 		write_amcntenset1_px(AMU_GROUP1_COUNTERS_MASK);
 	}
@@ -223,7 +199,7 @@ static uint64_t amu_group1_cnt_read(unsigned  int idx)
 {
 	assert(amu_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_cg1nc());
 
 	return amu_group1_cnt_read_internal(idx);
 }
@@ -233,7 +209,7 @@ static void amu_group1_cnt_write(unsigned  int idx, uint64_t val)
 {
 	assert(amu_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_cg1nc());
 
 	amu_group1_cnt_write_internal(idx, val);
 	isb();
@@ -249,20 +225,12 @@ static void *amu_context_save(const void *arg)
 		return (void *)-1;
 	}
 
-#if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
-		if (!amu_group1_supported()) {
-			return (void *)-1;
-		}
-	}
-#endif
-
 	/* Assert that group 0/1 counter configuration is what we expect */
 	assert(read_amcntenset0_px() ==
 		((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U));
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		assert(read_amcntenset1_px() == AMU_GROUP1_COUNTERS_MASK);
 	}
 #endif
@@ -273,7 +241,7 @@ static void *amu_context_save(const void *arg)
 	write_amcntenclr0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		write_amcntenclr1_px(AMU_GROUP1_COUNTERS_MASK);
 	}
 #endif
@@ -286,9 +254,9 @@ static void *amu_context_save(const void *arg)
 	}
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		/* Save group 1 counters */
-		for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+		for (i = 0U; i < read_amcgcr_cg1nc(); i++) {
 			if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) {
 				ctx->group1_cnts[i] = amu_group1_cnt_read(i);
 			}
@@ -308,19 +276,11 @@ static void *amu_context_restore(const void *arg)
 		return (void *)-1;
 	}
 
-#if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
-		if (!amu_group1_supported()) {
-			return (void *)-1;
-		}
-	}
-#endif
-
 	/* Counters were disabled in `amu_context_save()` */
 	assert(read_amcntenset0_px() == 0U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		assert(read_amcntenset1_px() == 0U);
 	}
 #endif
@@ -334,9 +294,9 @@ static void *amu_context_restore(const void *arg)
 	write_amcntenset0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		/* Restore group 1 counters */
-		for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+		for (i = 0U; i < read_amcgcr_cg1nc(); i++) {
 			if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) {
 				amu_group1_cnt_write(i, ctx->group1_cnts[i]);
 			}

lib/extensions/amu/aarch64/amu.c

@@ -163,30 +163,6 @@ void amu_enable(bool el2_unused, cpu_context_t *ctx)
 		return;
 	}
 
-#if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
-		/* Check and set presence of group 1 counters */
-		if (!amu_group1_supported()) {
-			ERROR("AMU Counter Group 1 is not implemented\n");
-			panic();
-		}
-
-		/* Check number of group 1 counters */
-		uint64_t cnt_num = read_amcgcr_el0_cg1nc();
-
-		VERBOSE("%s%llu. %s%u\n",
-			"Number of AMU Group 1 Counters ", cnt_num,
-			"Requested number ", AMU_GROUP1_NR_COUNTERS);
-
-		if (cnt_num < AMU_GROUP1_NR_COUNTERS) {
-			ERROR("%s%llu is less than %s%u\n",
-			"Number of AMU Group 1 Counters ", cnt_num,
-			"Requested number ", AMU_GROUP1_NR_COUNTERS);
-			panic();
-		}
-	}
-#endif
-
 	if (el2_unused) {
 		/*
 		 * CPTR_EL2.TAM: Set to zero so any accesses to
@@ -206,7 +182,7 @@ void amu_enable(bool el2_unused, cpu_context_t *ctx)
 	write_amcntenset0_el0_px((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		/* Enable group 1 counters */
 		write_amcntenset1_el0_px(AMU_GROUP1_COUNTERS_MASK);
 	}
@@ -293,7 +269,7 @@ static uint64_t amu_group1_cnt_read(unsigned int idx)
 {
 	assert(amu_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_el0_cg1nc());
 
 	return amu_group1_cnt_read_internal(idx);
 }
@@ -303,7 +279,7 @@ static void amu_group1_cnt_write(unsigned int idx, uint64_t val)
 {
 	assert(amu_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_el0_cg1nc());
 
 	amu_group1_cnt_write_internal(idx, val);
 	isb();
@@ -318,7 +294,7 @@ static uint64_t amu_group1_voffset_read(unsigned int idx)
 {
 	assert(amu_v1p1_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_el0_cg1nc());
 	assert((read_amcg1idr_el0_voff() & (UINT64_C(1) << idx)) != 0U);
 
 	return amu_group1_voffset_read_internal(idx);
@@ -333,7 +309,7 @@ static void amu_group1_voffset_write(unsigned int idx, uint64_t val)
 {
 	assert(amu_v1p1_supported());
 	assert(amu_group1_supported());
-	assert(idx < AMU_GROUP1_NR_COUNTERS);
+	assert(idx < read_amcgcr_el0_cg1nc());
 	assert((read_amcg1idr_el0_voff() & (UINT64_C(1) << idx)) != 0U);
 
 	amu_group1_voffset_write_internal(idx, val);
@@ -350,20 +326,12 @@ static void *amu_context_save(const void *arg)
 		return (void *)-1;
 	}
 
-#if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
-		if (!amu_group1_supported()) {
-			return (void *)-1;
-		}
-	}
-#endif
-
 	/* Assert that group 0/1 counter configuration is what we expect */
 	assert(read_amcntenset0_el0_px() ==
 		((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U));
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		assert(read_amcntenset1_el0_px() == AMU_GROUP1_COUNTERS_MASK);
 	}
 #endif
@@ -375,7 +343,7 @@ static void *amu_context_save(const void *arg)
 	write_amcntenclr0_el0_px((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		write_amcntenclr1_el0_px(AMU_GROUP1_COUNTERS_MASK);
 	}
 #endif
@@ -396,9 +364,9 @@ static void *amu_context_save(const void *arg)
 	}
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		/* Save group 1 counters */
-		for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+		for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
 			if ((AMU_GROUP1_COUNTERS_MASK & (1UL << i)) != 0U) {
 				ctx->group1_cnts[i] = amu_group1_cnt_read(i);
 			}
@@ -409,7 +377,7 @@ static void *amu_context_save(const void *arg)
 			uint64_t amcg1idr = read_amcg1idr_el0_voff() &
 				AMU_GROUP1_COUNTERS_MASK;
 
-			for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+			for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
 				if (((amcg1idr >> i) & 1ULL) != 0ULL) {
 					ctx->group1_voffsets[i] =
 						amu_group1_voffset_read(i);
@@ -431,19 +399,11 @@ static void *amu_context_restore(const void *arg)
 		return (void *)-1;
 	}
 
-#if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
-		if (!amu_group1_supported()) {
-			return (void *)-1;
-		}
-	}
-#endif
-
 	/* Counters were disabled in `amu_context_save()` */
 	assert(read_amcntenset0_el0_px() == 0U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		assert(read_amcntenset1_el0_px() == 0U);
 	}
 #endif
@@ -465,9 +425,9 @@ static void *amu_context_restore(const void *arg)
 	write_amcntenset0_el0_px((UINT64_C(1) << read_amcgcr_el0_cg0nc()) - 1U);
 
 #if ENABLE_AMU_AUXILIARY_COUNTERS
-	if (AMU_GROUP1_NR_COUNTERS > 0U) {
+	if (amu_group1_supported()) {
 		/* Restore group 1 counters */
-		for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+		for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
 			if ((AMU_GROUP1_COUNTERS_MASK & (1UL << i)) != 0U) {
 				amu_group1_cnt_write(i, ctx->group1_cnts[i]);
 			}
@@ -478,7 +438,7 @@ static void *amu_context_restore(const void *arg)
 			uint64_t amcg1idr = read_amcg1idr_el0_voff() &
 				AMU_GROUP1_COUNTERS_MASK;
 
-			for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+			for (i = 0U; i < read_amcgcr_el0_cg1nc(); i++) {
 				if (((amcg1idr >> i) & 1ULL) != 0ULL) {
 					amu_group1_voffset_write(i,
 						ctx->group1_voffsets[i]);