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fix(cpus): workaround for Neoverse V1 erratum 2743093

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Neoverse V1 erratum 2743093 is a Cat B erratum that applies to
all revisions <=r1p2 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1401781/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I8ee7c16c14c4fd6ee35d20c855273ecfce0d1b32
This commit is contained in:
Bipin Ravi 2022-12-15 11:57:53 -06:00
parent f4d8ed50d2
commit 31747f057b
3 changed files with 44 additions and 0 deletions
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4
docs/design/cpu-specific-build-macros.rst
View file

@ -460,6 +460,10 @@ For Neoverse V1, the following errata build flags are defined :
CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU.
It is still open.
- ``ERRATA_V1_2743093``: This applies errata 2743093 workaround to Neoverse-V1
CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the
CPU. It is still open.
For Cortex-A710, the following errata build flags are defined :
- ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to

31
lib/cpus/aarch64/neoverse_v1.S
View file

@ -462,6 +462,30 @@ func check_errata_2372203
b cpu_rev_var_ls
endfunc check_errata_2372203
/* ----------------------------------------------------
* Errata Workaround for Neoverse V1 Errata #2743093.
* This applies to revisions <= r1p2 and is still open.
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* ----------------------------------------------------
*/
func errata_neoverse_v1_2743093_wa
mov x17, x30
bl check_errata_2743093
cbz x0, 1f
/* dsb before isb of power down sequence */
dsb sy
1:
ret x17
endfunc errata_neoverse_v1_2743093_wa
func check_errata_2743093
/* Applies to all revisions <= r1p2 */
mov x1, #0x12
b cpu_rev_var_ls
endfunc check_errata_2743093
func check_errata_cve_2022_23960
#if WORKAROUND_CVE_2022_23960
mov x0, #ERRATA_APPLIES
@ -483,6 +507,12 @@ func neoverse_v1_core_pwr_dwn
mrs x0, NEOVERSE_V1_CPUPWRCTLR_EL1
orr x0, x0, #NEOVERSE_V1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
msr NEOVERSE_V1_CPUPWRCTLR_EL1, x0
#if ERRATA_V1_2743093
mov x15, x30
bl cpu_get_rev_var
bl errata_neoverse_v1_2743093_wa
mov x30, x15
#endif /* ERRATA_V1_2743093 */
isb
ret
endfunc neoverse_v1_core_pwr_dwn
@ -513,6 +543,7 @@ func neoverse_v1_errata_report
report_errata ERRATA_V1_2216392, neoverse_v1, 2216392
report_errata ERRATA_V1_2294912, neoverse_v1, 2294912
report_errata ERRATA_V1_2372203, neoverse_v1, 2372203
report_errata ERRATA_V1_2743093, neoverse_v1, 2743093
report_errata WORKAROUND_CVE_2022_23960, neoverse_v1, cve_2022_23960
ldp x8, x30, [sp], #16

9
lib/cpus/cpu-ops.mk
View file

@ -516,6 +516,11 @@ ERRATA_V1_2294912 ?=0
# to revisions r0p0, r1p0 and r1p1 of the Neoverse V1 cpu and is still open.
ERRATA_V1_2372203 ?=0
# Flag to apply erratum 2743093 workaround during powerdown. This erratum
# applies to revisions r0p0, r1p0, r1p1 and r1p2 of the Neoverse V1 cpu and is
# still open.
ERRATA_V1_2743093 ?=0
# Flag to apply erratum 1987031 workaround during reset. This erratum applies
# to revisions r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is still open.
ERRATA_A710_1987031 ?=0
@ -1162,6 +1167,10 @@ $(eval $(call add_define,ERRATA_V1_2294912))
$(eval $(call assert_boolean,ERRATA_V1_2372203))
$(eval $(call add_define,ERRATA_V1_2372203))
# Process ERRATA_V1_2743093 flag
$(eval $(call assert_boolean,ERRATA_V1_2743093))
$(eval $(call add_define,ERRATA_V1_2743093))
# Process ERRATA_A710_1987031 flag
$(eval $(call assert_boolean,ERRATA_A710_1987031))
$(eval $(call add_define,ERRATA_A710_1987031))