From 308ebfa18859c89c8b630c1c130e7002095e875f Mon Sep 17 00:00:00 2001 From: Madhukar Pappireddy Date: Mon, 17 Jun 2024 15:26:00 -0500 Subject: [PATCH] feat(simd): introduce simd context helper APIs This patch adds the common API to save and restore FP and SVE. When SVE is enabled we save and restore SVE which automatically covers FP. If FP is enabled while SVE is not, then we save and restore FP only. The patch uses simd_ctx_t to save and restore both FP and SVE which means developers need not use fp or sve routines directly. Once all the calls to fpregs_context_* are replaced with simd_ctx_*, we can remove fp_regs_t data structure and macros (taken care in a following patch). simd_ctx_t is currently allocated in section of its own. This will go into BSS section by default but platform will have option of relocating it to a different section by overriding in plat.ld.S. Signed-off-by: Madhukar Pappireddy Signed-off-by: Okash Khawaja Change-Id: I090f8b8fa3862e527b6c40385249adc69256bf24 --- Makefile | 2 + bl31/bl31.mk | 1 + include/lib/el3_runtime/aarch64/context.h | 5 +- lib/el3_runtime/simd_ctx.c | 81 +++++++++++++++++++++++ make_helpers/defaults.mk | 4 ++ 5 files changed, 91 insertions(+), 2 deletions(-) create mode 100644 lib/el3_runtime/simd_ctx.c diff --git a/Makefile b/Makefile index d5a70efa8..c99b4bb83 100644 --- a/Makefile +++ b/Makefile @@ -1169,6 +1169,7 @@ $(eval $(call assert_booleans,\ SEPARATE_CODE_AND_RODATA \ SEPARATE_BL2_NOLOAD_REGION \ SEPARATE_NOBITS_REGION \ + SEPARATE_SIMD_SECTION \ SPIN_ON_BL1_EXIT \ SPM_MM \ SPMC_AT_EL3 \ @@ -1342,6 +1343,7 @@ $(eval $(call add_defines,\ SEPARATE_CODE_AND_RODATA \ SEPARATE_BL2_NOLOAD_REGION \ SEPARATE_NOBITS_REGION \ + SEPARATE_SIMD_SECTION \ RECLAIM_INIT_CODE \ SPD_${SPD} \ SPIN_ON_BL1_EXIT \ diff --git a/bl31/bl31.mk b/bl31/bl31.mk index 7e9fde352..2f1215ce3 100644 --- a/bl31/bl31.mk +++ b/bl31/bl31.mk @@ -46,6 +46,7 @@ BL31_SOURCES += bl31/bl31_main.c \ plat/common/aarch64/platform_mp_stack.S \ services/arm_arch_svc/arm_arch_svc_setup.c \ services/std_svc/std_svc_setup.c \ + lib/el3_runtime/simd_ctx.c \ ${PSCI_LIB_SOURCES} \ ${SPMD_SOURCES} \ ${SPM_MM_SOURCES} \ diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h index 7c10506db..8df979710 100644 --- a/include/lib/el3_runtime/aarch64/context.h +++ b/include/lib/el3_runtime/aarch64/context.h @@ -10,6 +10,7 @@ #include #include #include +#include #include /******************************************************************************* @@ -422,8 +423,8 @@ CASSERT(CTX_PAUTH_REGS_OFFSET == __builtin_offsetof(cpu_context_t, pauth_ctx), * Function prototypes ******************************************************************************/ #if CTX_INCLUDE_FPREGS -void fpregs_context_save(fp_regs_t *regs); -void fpregs_context_restore(fp_regs_t *regs); +void fpregs_context_save(simd_regs_t *regs); +void fpregs_context_restore(simd_regs_t *regs); #endif #endif /* __ASSEMBLER__ */ diff --git a/lib/el3_runtime/simd_ctx.c b/lib/el3_runtime/simd_ctx.c new file mode 100644 index 000000000..f7a87dfe1 --- /dev/null +++ b/lib/el3_runtime/simd_ctx.c @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2022, Google LLC. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#if CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS + +/* SIMD context managed for Secure and Normal Worlds. */ +#define SIMD_CTXT_COUNT 2 + +#if SEPARATE_SIMD_SECTION +__section(".simd_context") +#else +__section(".bss.simd_context") +#endif +static simd_regs_t simd_context[SIMD_CTXT_COUNT][PLATFORM_CORE_COUNT]; + +void simd_ctx_save(uint32_t security_state, bool hint_sve) +{ + simd_regs_t *regs; + + if (security_state != NON_SECURE && security_state != SECURE) { + ERROR("Unsupported security state specified for SIMD context: %u\n", + security_state); + panic(); + } + + regs = &simd_context[security_state][plat_my_core_pos()]; + +#if CTX_INCLUDE_SVE_REGS + regs->hint = hint_sve; + + if (hint_sve) { + /* + * Hint bit denoting absence of SVE live state. Hence, only + * save FP context. + */ + fpregs_context_save(regs); + } else { + sve_context_save(regs); + } +#elif CTX_INCLUDE_FPREGS + fpregs_context_save(regs); +#endif +} + +void simd_ctx_restore(uint32_t security_state) +{ + simd_regs_t *regs; + + if (security_state != NON_SECURE && security_state != SECURE) { + ERROR("Unsupported security state specified for SIMD context: %u\n", + security_state); + panic(); + } + + regs = &simd_context[security_state][plat_my_core_pos()]; + +#if CTX_INCLUDE_SVE_REGS + if (regs->hint) { + fpregs_context_restore(regs); + } else { + sve_context_restore(regs); + } +#elif CTX_INCLUDE_FPREGS + fpregs_context_restore(regs); +#endif +} +#endif /* CTX_INCLUDE_FPREGS || CTX_INCLUDE_SVE_REGS */ diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk index 1224a4ab6..290a6feed 100644 --- a/make_helpers/defaults.mk +++ b/make_helpers/defaults.mk @@ -240,6 +240,10 @@ SEPARATE_NOBITS_REGION := 0 # region, platform Makefile is free to override this value. SEPARATE_BL2_NOLOAD_REGION := 0 +# Put SIMD context data structures in a separate memory region. Platforms +# have the choice to put it outside of default BSS region of EL3 firmware. +SEPARATE_SIMD_SECTION := 0 + # If the BL31 image initialisation code is recalimed after use for the secondary # cores stack RECLAIM_INIT_CODE := 0