mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-27 23:35:10 +00:00
build: Reorder build variables alphabetically
When build variables are assigned or processed en masse, they'd appear neater in alphabetical order. Static initializations are moved to a separate file, make_helpers/defaults.mk, which in itself is sorted alphabetically. No functional changes. Change-Id: I966010042b33de6b67592fb9ffcef8fc44d7d128 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
This commit is contained in:
Jeenu Viswambharan
parent
01920cfdf9
commit
2fae4b1e07
2 changed files with 184 additions and 114 deletions
156
Makefile
156
Makefile
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@ -42,87 +42,15 @@ include ${MAKE_HELPERS_DIRECTORY}build_macros.mk
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include ${MAKE_HELPERS_DIRECTORY}build_env.mk
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################################################################################
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# Default values for build configurations
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# Default values for build configurations, and their dependencies
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################################################################################
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# The Target build architecture. Supported values are: aarch64, aarch32.
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ARCH := aarch64
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# Build verbosity
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V := 0
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# Debug build
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DEBUG := 0
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# Build platform
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DEFAULT_PLAT := fvp
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PLAT := ${DEFAULT_PLAT}
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# SPD choice
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SPD := none
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# The AArch32 Secure Payload to be built as BL32 image
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AARCH32_SP := none
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# Base commit to perform code check on
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BASE_COMMIT := origin/master
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# NS timer register save and restore
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NS_TIMER_SWITCH := 0
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# By default, BL1 acts as the reset handler, not BL31
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RESET_TO_BL31 := 0
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# Include FP registers in cpu context
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CTX_INCLUDE_FPREGS := 0
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# Build flag to include AArch32 registers in cpu context save and restore
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# during world switch. This flag must be set to 0 for AArch64-only platforms.
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CTX_INCLUDE_AARCH32_REGS := 1
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# Determine the version of ARM GIC architecture to use for interrupt management
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# in EL3. The platform port can change this value if needed.
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ARM_GIC_ARCH := 2
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# Determine the version of ARM CCI product used in the platform. The platform
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# port can change this value if needed.
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ARM_CCI_PRODUCT_ID := 400
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# Flag used to indicate if ASM_ASSERTION should be enabled for the build.
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# This defaults to being present in DEBUG builds only.
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ASM_ASSERTION := ${DEBUG}
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# Build option to choose whether Trusted firmware uses Coherent memory or not.
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USE_COHERENT_MEM := 1
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# Flag used to choose the power state format viz Extended State-ID or the Original
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# format.
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PSCI_EXTENDED_STATE_ID := 0
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# Default FIP file name
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FIP_NAME := fip.bin
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# Default FWU_FIP file name
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FWU_FIP_NAME := fwu_fip.bin
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# By default, use the -pedantic option in the gcc command line
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DISABLE_PEDANTIC := 0
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# Flags to generate the Chain of Trust
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GENERATE_COT := 0
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CREATE_KEYS := 1
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SAVE_KEYS := 0
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# Flags to build TF with Trusted Boot support
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TRUSTED_BOARD_BOOT := 0
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# By default, consider that the platform's reset address is not programmable.
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# The platform Makefile is free to override this value.
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PROGRAMMABLE_RESET_ADDRESS := 0
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# Build flag to treat usage of deprecated platform and framework APIs as error.
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ERROR_DEPRECATED := 0
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# By default, consider that the platform may release several CPUs out of reset.
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# The platform Makefile is free to override this value.
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COLD_BOOT_SINGLE_CPU := 0
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# Flag to introduce an infinite loop in BL1 just before it exits into the next
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# image. This is meant to help debugging the post-BL2 phase.
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SPIN_ON_BL1_EXIT := 0
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# Build PL011 UART driver in minimal generic UART mode
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PL011_GENERIC_UART := 0
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# Flag to enable Performance Measurement Framework
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ENABLE_PMF := 0
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# Flag to enable PSCI STATs functionality
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ENABLE_PSCI_STAT := 0
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# Whether code and read-only data should be put on separate memory pages.
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# The platform Makefile is free to override this value.
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SEPARATE_CODE_AND_RODATA := 0
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# Flag to enable new version of image loading
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LOAD_IMAGE_V2 := 0
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# Flag to enable runtime instrumentation using PMF
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ENABLE_RUNTIME_INSTRUMENTATION := 0
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include ${MAKE_HELPERS_DIRECTORY}defaults.mk
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ifeq (${ENABLE_RUNTIME_INSTRUMENTATION}, 1)
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ENABLE_PMF := 1
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endif
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# ASM_ASSERTION enabled for DEBUG builds only
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ASM_ASSERTION := ${DEBUG}
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ENABLE_PMF := ${ENABLE_RUNTIME_INSTRUMENTATION}
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PLAT := ${DEFAULT_PLAT}
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################################################################################
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# Checkpatch script options
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@ -449,31 +377,30 @@ FIPTOOL ?= ${FIPTOOLPATH}/fiptool${BIN_EXT}
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# Build options checks
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################################################################################
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$(eval $(call assert_boolean,DEBUG))
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$(eval $(call assert_boolean,NS_TIMER_SWITCH))
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$(eval $(call assert_boolean,RESET_TO_BL31))
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$(eval $(call assert_boolean,CTX_INCLUDE_FPREGS))
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$(eval $(call assert_boolean,CTX_INCLUDE_AARCH32_REGS))
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$(eval $(call assert_boolean,ASM_ASSERTION))
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$(eval $(call assert_boolean,USE_COHERENT_MEM))
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$(eval $(call assert_boolean,DISABLE_PEDANTIC))
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$(eval $(call assert_boolean,GENERATE_COT))
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$(eval $(call assert_boolean,CREATE_KEYS))
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$(eval $(call assert_boolean,SAVE_KEYS))
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$(eval $(call assert_boolean,TRUSTED_BOARD_BOOT))
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$(eval $(call assert_boolean,PROGRAMMABLE_RESET_ADDRESS))
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$(eval $(call assert_boolean,COLD_BOOT_SINGLE_CPU))
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$(eval $(call assert_boolean,PSCI_EXTENDED_STATE_ID))
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$(eval $(call assert_boolean,ERROR_DEPRECATED))
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$(eval $(call assert_boolean,CREATE_KEYS))
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$(eval $(call assert_boolean,CTX_INCLUDE_AARCH32_REGS))
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$(eval $(call assert_boolean,CTX_INCLUDE_FPREGS))
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$(eval $(call assert_boolean,DEBUG))
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$(eval $(call assert_boolean,DISABLE_PEDANTIC))
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$(eval $(call assert_boolean,ENABLE_PLAT_COMPAT))
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$(eval $(call assert_boolean,SPIN_ON_BL1_EXIT))
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$(eval $(call assert_boolean,PL011_GENERIC_UART))
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$(eval $(call assert_boolean,ENABLE_PMF))
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$(eval $(call assert_boolean,ENABLE_PSCI_STAT))
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$(eval $(call assert_boolean,SEPARATE_CODE_AND_RODATA))
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$(eval $(call assert_boolean,LOAD_IMAGE_V2))
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$(eval $(call assert_boolean,ENABLE_RUNTIME_INSTRUMENTATION))
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$(eval $(call assert_boolean,ERROR_DEPRECATED))
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$(eval $(call assert_boolean,GENERATE_COT))
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$(eval $(call assert_boolean,LOAD_IMAGE_V2))
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$(eval $(call assert_boolean,NS_TIMER_SWITCH))
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$(eval $(call assert_boolean,PL011_GENERIC_UART))
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$(eval $(call assert_boolean,PROGRAMMABLE_RESET_ADDRESS))
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$(eval $(call assert_boolean,PSCI_EXTENDED_STATE_ID))
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$(eval $(call assert_boolean,RESET_TO_BL31))
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$(eval $(call assert_boolean,SAVE_KEYS))
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$(eval $(call assert_boolean,SEPARATE_CODE_AND_RODATA))
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$(eval $(call assert_boolean,SPIN_ON_BL1_EXIT))
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$(eval $(call assert_boolean,TRUSTED_BOARD_BOOT))
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$(eval $(call assert_boolean,USE_COHERENT_MEM))
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################################################################################
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# Add definitions to the cpp preprocessor based on the current build options.
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@ -481,30 +408,31 @@ $(eval $(call assert_boolean,ENABLE_RUNTIME_INSTRUMENTATION))
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# platform to overwrite the default options
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################################################################################
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$(eval $(call add_define,PLAT_${PLAT}))
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$(eval $(call add_define,SPD_${SPD}))
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$(eval $(call add_define,NS_TIMER_SWITCH))
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$(eval $(call add_define,RESET_TO_BL31))
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$(eval $(call add_define,CTX_INCLUDE_FPREGS))
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$(eval $(call add_define,CTX_INCLUDE_AARCH32_REGS))
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$(eval $(call add_define,ARM_GIC_ARCH))
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$(eval $(call add_define,ARM_CCI_PRODUCT_ID))
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$(eval $(call add_define,ARM_GIC_ARCH))
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$(eval $(call add_define,ASM_ASSERTION))
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$(eval $(call add_define,LOG_LEVEL))
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$(eval $(call add_define,USE_COHERENT_MEM))
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$(eval $(call add_define,TRUSTED_BOARD_BOOT))
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$(eval $(call add_define,PROGRAMMABLE_RESET_ADDRESS))
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$(eval $(call add_define,COLD_BOOT_SINGLE_CPU))
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$(eval $(call add_define,PSCI_EXTENDED_STATE_ID))
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$(eval $(call add_define,ERROR_DEPRECATED))
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$(eval $(call add_define,CTX_INCLUDE_AARCH32_REGS))
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$(eval $(call add_define,CTX_INCLUDE_FPREGS))
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$(eval $(call add_define,ENABLE_PLAT_COMPAT))
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$(eval $(call add_define,SPIN_ON_BL1_EXIT))
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$(eval $(call add_define,PL011_GENERIC_UART))
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$(eval $(call add_define,ENABLE_PMF))
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$(eval $(call add_define,ENABLE_PSCI_STAT))
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$(eval $(call add_define,SEPARATE_CODE_AND_RODATA))
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$(eval $(call add_define,LOAD_IMAGE_V2))
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$(eval $(call add_define,ENABLE_RUNTIME_INSTRUMENTATION))
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$(eval $(call add_define,ERROR_DEPRECATED))
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$(eval $(call add_define,LOAD_IMAGE_V2))
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$(eval $(call add_define,LOG_LEVEL))
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$(eval $(call add_define,NS_TIMER_SWITCH))
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$(eval $(call add_define,PL011_GENERIC_UART))
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$(eval $(call add_define,PLAT_${PLAT}))
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$(eval $(call add_define,PROGRAMMABLE_RESET_ADDRESS))
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$(eval $(call add_define,PSCI_EXTENDED_STATE_ID))
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$(eval $(call add_define,RESET_TO_BL31))
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$(eval $(call add_define,SEPARATE_CODE_AND_RODATA))
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$(eval $(call add_define,SPD_${SPD}))
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$(eval $(call add_define,SPIN_ON_BL1_EXIT))
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$(eval $(call add_define,TRUSTED_BOARD_BOOT))
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$(eval $(call add_define,USE_COHERENT_MEM))
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# Define the EL3_PAYLOAD_BASE flag only if it is provided.
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ifdef EL3_PAYLOAD_BASE
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$(eval $(call add_define,EL3_PAYLOAD_BASE))
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142
make_helpers/defaults.mk
Normal file
142
make_helpers/defaults.mk
Normal file
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@ -0,0 +1,142 @@
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#
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# Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# Redistributions of source code must retain the above copyright notice, this
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# list of conditions and the following disclaimer.
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#
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# Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# Neither the name of ARM nor the names of its contributors may be used
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# to endorse or promote products derived from this software without specific
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# prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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# Default, static values for build variables, listed in alphabetic order.
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# Dependencies between build options, if any, are handled in the top-level
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# Makefile, after this file is included. This ensures that the former is better
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# poised to handle dependencies, as all build variables would have a default
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# value by then.
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# The AArch32 Secure Payload to be built as BL32 image
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AARCH32_SP := none
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# The Target build architecture. Supported values are: aarch64, aarch32.
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ARCH := aarch64
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# Determine the version of ARM CCI product used in the platform. The platform
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# port can change this value if needed.
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ARM_CCI_PRODUCT_ID := 400
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# Determine the version of ARM GIC architecture to use for interrupt management
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# in EL3. The platform port can change this value if needed.
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ARM_GIC_ARCH := 2
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# Flag used to indicate if ASM_ASSERTION should be enabled for the build.
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ASM_ASSERTION := 0
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# Base commit to perform code check on
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BASE_COMMIT := origin/master
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# By default, consider that the platform may release several CPUs out of reset.
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# The platform Makefile is free to override this value.
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COLD_BOOT_SINGLE_CPU := 0
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# For Chain of Trust
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CREATE_KEYS := 1
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# Build flag to include AArch32 registers in cpu context save and restore during
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# world switch. This flag must be set to 0 for AArch64-only platforms.
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CTX_INCLUDE_AARCH32_REGS := 1
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# Include FP registers in cpu context
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CTX_INCLUDE_FPREGS := 0
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# Debug build
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DEBUG := 0
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# Build platform
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DEFAULT_PLAT := fvp
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# By default, use the -pedantic option in the gcc command line
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DISABLE_PEDANTIC := 0
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# Flag to enable Performance Measurement Framework
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ENABLE_PMF := 0
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# Flag to enable PSCI STATs functionality
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ENABLE_PSCI_STAT := 0
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# Flag to enable runtime instrumentation using PMF
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ENABLE_RUNTIME_INSTRUMENTATION := 0
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# Build flag to treat usage of deprecated platform and framework APIs as error.
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ERROR_DEPRECATED := 0
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# Default FIP file name
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FIP_NAME := fip.bin
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# Default FWU_FIP file name
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FWU_FIP_NAME := fwu_fip.bin
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# For Chain of Trust
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GENERATE_COT := 0
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# Flag to enable new version of image loading
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LOAD_IMAGE_V2 := 0
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# NS timer register save and restore
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NS_TIMER_SWITCH := 0
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# Build PL011 UART driver in minimal generic UART mode
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PL011_GENERIC_UART := 0
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# By default, consider that the platform's reset address is not programmable.
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# The platform Makefile is free to override this value.
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PROGRAMMABLE_RESET_ADDRESS := 0
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# Flag used to choose the power state format viz Extended State-ID or the
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# Original format.
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PSCI_EXTENDED_STATE_ID := 0
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# By default, BL1 acts as the reset handler, not BL31
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RESET_TO_BL31 := 0
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# For Chain of Trust
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SAVE_KEYS := 0
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# Whether code and read-only data should be put on separate memory pages. The
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# platform Makefile is free to override this value.
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SEPARATE_CODE_AND_RODATA := 0
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# SPD choice
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SPD := none
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# Flag to introduce an infinite loop in BL1 just before it exits into the next
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# image. This is meant to help debugging the post-BL2 phase.
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SPIN_ON_BL1_EXIT := 0
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# Flags to build TF with Trusted Boot support
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TRUSTED_BOARD_BOOT := 0
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# Build option to choose whether Trusted firmware uses Coherent memory or not.
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USE_COHERENT_MEM := 1
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# Build verbosity
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V := 0
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