mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-18 02:24:18 +00:00
Merge "feat(versal): deprecate build time arg VERSAL_PLATFORM" into integration
This commit is contained in:
commit
2e1db2b4c7
6 changed files with 91 additions and 67 deletions
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@ -14,11 +14,6 @@ To build:
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal bl31
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```
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```
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To build ATF for different platform (supported are "silicon"(default) and "versal_virt")
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```bash
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal VERSAL_PLATFORM=versal_virt bl31
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```
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To build bl32 TSP you have to rebuild bl31 too
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To build bl32 TSP you have to rebuild bl31 too
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```bash
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```bash
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make CROSS_COMPILE=aarch64-none-elf- PLAT=versal SPD=tspd RESET_TO_BL31=1 bl31 bl32
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make CROSS_COMPILE=aarch64-none-elf- PLAT=versal SPD=tspd RESET_TO_BL31=1 bl31 bl32
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@ -51,11 +46,6 @@ Xilinx Versal platform specific build options
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- `pl011`, `pl011_0`: ARM pl011 UART 0
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- `pl011`, `pl011_0`: ARM pl011 UART 0
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- `pl011_1` : ARM pl011 UART 1
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- `pl011_1` : ARM pl011 UART 1
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* `VERSAL_PLATFORM`: Select the platform. Options:
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- `versal_virt` : Versal Virtual platform
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- `spp_itr6` : SPP ITR6
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- `emu_itr6` : EMU ITR6
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* `CPU_PWRDWN_SGI`: Select the SGI for triggering CPU power down request to
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* `CPU_PWRDWN_SGI`: Select the SGI for triggering CPU power down request to
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secondary cores on receiving power down callback from
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secondary cores on receiving power down callback from
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firmware. Options:
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firmware. Options:
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@ -1,12 +1,11 @@
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/*
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/*
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* Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
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* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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#include <common/debug.h>
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#include <common/debug.h>
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#include <drivers/generic_delay_timer.h>
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#include <lib/mmio.h>
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#include <lib/mmio.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <plat/common/platform.h>
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#include <plat/common/platform.h>
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@ -18,7 +17,7 @@
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#include <versal_def.h>
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#include <versal_def.h>
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uint32_t platform_id, platform_version;
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uint32_t platform_id, platform_version;
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uint32_t cpu_clock = VERSAL_CPU_CLOCK;
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uint32_t cpu_clock;
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/*
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/*
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* Table of regions to map using the MMU.
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* Table of regions to map using the MMU.
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@ -39,19 +38,10 @@ const mmap_region_t *plat_get_mmap(void)
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return plat_versal_mmap;
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return plat_versal_mmap;
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}
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}
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static void versal_print_platform_name(void)
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{
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NOTICE("TF-A running on %s\n", PLATFORM_NAME);
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}
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void versal_config_setup(void)
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void versal_config_setup(void)
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{
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{
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/* Configure IPI data for versal */
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/* Configure IPI data for versal */
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versal_ipi_config_table_init();
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versal_ipi_config_table_init();
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versal_print_platform_name();
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generic_delay_timer_init();
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}
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}
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void board_detection(void)
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void board_detection(void)
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@ -70,7 +60,50 @@ void board_detection(void)
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platform_version = FIELD_GET(PLATFORM_VERSION_MASK, plat_info[1]);
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platform_version = FIELD_GET(PLATFORM_VERSION_MASK, plat_info[1]);
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}
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}
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const char *board_name_decode(void)
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{
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const char *platform;
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switch (platform_id) {
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case VERSAL_SPP:
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platform = "IPP";
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break;
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case VERSAL_EMU:
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platform = "EMU";
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break;
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case VERSAL_QEMU:
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platform = "QEMU";
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break;
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case VERSAL_SILICON:
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platform = "SILICON";
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break;
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default:
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platform = "unknown";
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}
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return platform;
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}
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uint32_t get_uart_clk(void)
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uint32_t get_uart_clk(void)
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{
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{
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return UART_CLOCK;
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uint32_t uart_clock;
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switch (platform_id) {
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case VERSAL_SPP:
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uart_clock = 25000000;
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break;
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case VERSAL_EMU:
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uart_clock = 212000;
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break;
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case VERSAL_QEMU:
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uart_clock = 25000000;
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break;
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case VERSAL_SILICON:
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uart_clock = 100000000;
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break;
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default:
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panic();
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}
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return uart_clock;
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}
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}
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@ -1,7 +1,7 @@
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/*
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/*
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* Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
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* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -12,6 +12,7 @@
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#include <bl31/bl31.h>
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#include <bl31/bl31.h>
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#include <common/bl_common.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <common/debug.h>
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#include <drivers/generic_delay_timer.h>
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#include <lib/mmio.h>
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#include <lib/mmio.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <plat/common/platform.h>
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#include <plat/common/platform.h>
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@ -73,22 +74,41 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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enum pm_ret_status ret_status;
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enum pm_ret_status ret_status;
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uint64_t addr[HANDOFF_PARAMS_MAX_SIZE];
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uint64_t addr[HANDOFF_PARAMS_MAX_SIZE];
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set_cnt_freq();
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setup_console();
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/* Initialize the platform config for future decision making */
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versal_config_setup();
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/* Get platform related information */
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board_detection();
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/*
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/*
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* Do initial security configuration to allow DRAM/device access. On
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* Do initial security configuration to allow DRAM/device access. On
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* Base VERSAL only DRAM security is programmable (via TrustZone), but
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* Base VERSAL only DRAM security is programmable (via TrustZone), but
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* other platforms might have more programmable security devices
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* other platforms might have more programmable security devices
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* present.
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* present.
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*/
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*/
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versal_config_setup();
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/* Initialize the platform config for future decision making */
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board_detection();
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switch (platform_id) {
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case VERSAL_SPP:
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cpu_clock = 2720000;
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break;
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case VERSAL_EMU:
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cpu_clock = 212000;
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break;
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case VERSAL_QEMU:
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/* Random values now */
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cpu_clock = 2720000;
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break;
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case VERSAL_SILICON:
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cpu_clock = 100000000;
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break;
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default:
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panic();
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}
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set_cnt_freq();
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generic_delay_timer_init();
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setup_console();
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NOTICE("TF-A running on %s %d\n", board_name_decode(), platform_version);
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/* Populate common information for BL32 and BL33 */
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/* Populate common information for BL32 and BL33 */
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SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
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SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0);
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@ -1,7 +1,7 @@
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/*
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/*
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* Copyright (c) 2018-2019, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2019, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
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* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -25,6 +25,8 @@ const mmap_region_t *plat_get_mmap(void);
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extern uint32_t cpu_clock, platform_id, platform_version;
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extern uint32_t cpu_clock, platform_id, platform_version;
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void board_detection(void);
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void board_detection(void);
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const char *board_name_decode(void);
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void plat_versal_gic_driver_init(void);
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void plat_versal_gic_driver_init(void);
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void plat_versal_gic_init(void);
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void plat_versal_gic_init(void);
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void plat_versal_gic_cpuif_enable(void);
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void plat_versal_gic_cpuif_enable(void);
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@ -1,7 +1,7 @@
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/*
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/*
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* Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
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* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -25,13 +25,11 @@
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#define CONSOLE_IS(con) (VERSAL_CONSOLE_ID_ ## con == VERSAL_CONSOLE)
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#define CONSOLE_IS(con) (VERSAL_CONSOLE_ID_ ## con == VERSAL_CONSOLE)
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/* List all supported platforms */
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/* List of platforms */
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#define VERSAL_PLATFORM_ID_versal_virt 1
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#define VERSAL_SILICON U(0)
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#define VERSAL_PLATFORM_ID_spp_itr6 2
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#define VERSAL_SPP U(1)
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#define VERSAL_PLATFORM_ID_emu_itr6 3
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#define VERSAL_EMU U(2)
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#define VERSAL_PLATFORM_ID_silicon 4
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#define VERSAL_QEMU U(3)
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#define VERSAL_PLATFORM_IS(con) (VERSAL_PLATFORM_ID_ ## con == VERSAL_PLATFORM)
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/* Firmware Image Package */
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/* Firmware Image Package */
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#define VERSAL_PRIMARY_CPU 0
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#define VERSAL_PRIMARY_CPU 0
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@ -75,27 +73,7 @@
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/*******************************************************************************
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/*******************************************************************************
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* Platform related constants
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* Platform related constants
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******************************************************************************/
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******************************************************************************/
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#if VERSAL_PLATFORM_IS(versal_virt)
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#define UART_BAUDRATE 115200
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# define PLATFORM_NAME "Versal Virt"
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# define UART_CLOCK 25000000
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# define UART_BAUDRATE 115200
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# define VERSAL_CPU_CLOCK 2720000
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#elif VERSAL_PLATFORM_IS(silicon)
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# define PLATFORM_NAME "Versal Silicon"
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# define UART_CLOCK 100000000
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# define UART_BAUDRATE 115200
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# define VERSAL_CPU_CLOCK 100000000
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#elif VERSAL_PLATFORM_IS(spp_itr6)
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# define PLATFORM_NAME "SPP ITR6"
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# define UART_CLOCK 25000000
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# define UART_BAUDRATE 115200
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# define VERSAL_CPU_CLOCK 2720000
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#elif VERSAL_PLATFORM_IS(emu_itr6)
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# define PLATFORM_NAME "EMU ITR6"
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# define UART_CLOCK 212000
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# define UART_BAUDRATE 9600
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# define VERSAL_CPU_CLOCK 212000
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#endif
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/* Access control register defines */
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/* Access control register defines */
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#define ACTLR_EL3_L2ACTLR_BIT (1 << 6)
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#define ACTLR_EL3_L2ACTLR_BIT (1 << 6)
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@ -1,5 +1,5 @@
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# Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
|
# Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
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||||||
# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
|
# Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
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#
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#
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# SPDX-License-Identifier: BSD-3-Clause
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# SPDX-License-Identifier: BSD-3-Clause
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@ -44,8 +44,9 @@ ifdef IPI_CRC_CHECK
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$(eval $(call add_define,IPI_CRC_CHECK))
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$(eval $(call add_define,IPI_CRC_CHECK))
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endif
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endif
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VERSAL_PLATFORM ?= silicon
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ifdef VERSAL_PLATFORM
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$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM}))
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$(warning "VERSAL_PLATFORM has been deprecated")
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endif
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ifdef XILINX_OF_BOARD_DTB_ADDR
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ifdef XILINX_OF_BOARD_DTB_ADDR
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$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
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$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
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|
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Loading…
Add table
Reference in a new issue