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lib/cpus: fix branching in reset function for cortex-a72 AARCH32 mode
In AARCH32 mode, cortex_a72_reset_func branches to address in lr register instead of r5 register. This leads to linux boot failure of Cortex-A72 cores in AARCH32 mode on Juno-R2 board. This patch fixes the branching of cortex_a72_reset_func to r5 register as in cortex_a57_reset_func implementation. Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
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@ -109,7 +109,7 @@ func cortex_a72_reset_func
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orr64_imm r0, r1, CORTEX_A72_ECTLR_SMP_BIT
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orr64_imm r0, r1, CORTEX_A72_ECTLR_SMP_BIT
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stcopr16 r0, r1, CORTEX_A72_ECTLR
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stcopr16 r0, r1, CORTEX_A72_ECTLR
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isb
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isb
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bx lr
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bx r5
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endfunc cortex_a72_reset_func
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endfunc cortex_a72_reset_func
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/* ----------------------------------------------------
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/* ----------------------------------------------------
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