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feat(plat/arm): allow BL32 specific defines to be used by SPMC_AT_EL3
For EL3 SPMC configuration enabled platforms, allow the reuse of BL32 specific definitions. Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Change-Id: I37ffbbf680326c101fbb2f146085a96c138f07a1
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1 changed files with 5 additions and 4 deletions
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@ -618,7 +618,7 @@
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* Trusted DRAM (if available) or the DRAM region secured by the TrustZone
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* controller.
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*/
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# if SPM_MM
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# if SPM_MM || SPMC_AT_EL3
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# define TSP_SEC_MEM_BASE (ARM_AP_TZC_DRAM1_BASE + ULL(0x200000))
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# define TSP_SEC_MEM_SIZE (ARM_AP_TZC_DRAM1_SIZE - ULL(0x200000))
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# define BL32_BASE (ARM_AP_TZC_DRAM1_BASE + ULL(0x200000))
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@ -664,12 +664,13 @@
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/*
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* BL32 is mandatory in AArch32. In AArch64, undefine BL32_BASE if there is no
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* SPD and no SPM-MM, as they are the only ones that can be used as BL32.
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* SPD and no SPM-MM and no SPMC-AT-EL3, as they are the only ones that can be
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* used as BL32.
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*/
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#if defined(__aarch64__) && !JUNO_AARCH32_EL3_RUNTIME
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# if defined(SPD_none) && !SPM_MM
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# if defined(SPD_none) && !SPM_MM && !SPMC_AT_EL3
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# undef BL32_BASE
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# endif /* defined(SPD_none) && !SPM_MM */
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# endif /* defined(SPD_none) && !SPM_MM || !SPMC_AT_EL3 */
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#endif /* defined(__aarch64__) && !JUNO_AARCH32_EL3_RUNTIME */
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/*******************************************************************************
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