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fix(smccc): register PMUv3p5 and PMUv3p7 bits with the FEATURE_AVAILABILITY call
These bits were missed with the original implementation. They are set if supported, so we need to ignore them. Change-Id: I3a94017bacdc54bfc14f0add972240148da3b41d Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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@ -298,6 +298,8 @@ CASSERT((CPTR_EL3_FLIPPED & CPTR_EL3_FEATS) == CPTR_EL3_FLIPPED, cptr_flipped_no
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MDCR_MTPME_BIT | \
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MDCR_NSTBE_BIT | \
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MDCR_NSTB(2UL) | \
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MDCR_MCCD_BIT | \
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MDCR_SCCD_BIT | \
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MDCR_SDD_BIT | \
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MDCR_SPD32(3UL) | \
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MDCR_NSPB(2UL) | \
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