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PSCI: Fix MISRA defects in platform code

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Fix violations of MISRA C-2012 Rules 10.1, 10.3, 13.3, 14.4, 17.7 and
17.8.

Change-Id: I6c9725e428b5752f1d80684ec29cb6c52a5c0c2d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
This commit is contained in:
Antonio Nino Diaz 2018-07-18 16:24:16 +01:00
parent 1083b2b315
commit 2bc3dba924
4 changed files with 27 additions and 24 deletions
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7
include/plat/common/platform.h
View file

@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __PLATFORM_H__
#define __PLATFORM_H__
#ifndef PLATFORM_H
#define PLATFORM_H
#include <psci.h>
#include <stdint.h>
@ -401,5 +401,4 @@ unsigned int platform_get_core_pos(unsigned long mpidr) __deprecated;
#endif /* __ENABLE_PLAT_COMPAT__ */
#endif /* __PLATFORM_H__ */
#endif /* PLATFORM_H */

8
plat/arm/common/arm_nor_psci_mem_protect.c
View file

@ -51,14 +51,14 @@ int arm_psci_read_mem_protect(int *enabled)
******************************************************************************/
int arm_nor_psci_write_mem_protect(int val)
{
int enable = (val != 0);
int enable = (val != 0) ? 1 : 0;
if (nor_unlock(PLAT_ARM_MEM_PROT_ADDR) != 0) {
ERROR("unlocking memory protect variable\n");
return -1;
}
if (enable != 0) {
if (enable == 1) {
/*
* If we want to write a value different than 0
* then we have to erase the full block because
@ -117,14 +117,14 @@ void arm_nor_psci_do_static_mem_protect(void)
{
int enable;
arm_psci_read_mem_protect(&enable);
(void) arm_psci_read_mem_protect(&enable);
if (enable == 0)
return;
INFO("PSCI: Overwriting non secure memory\n");
clear_mem_regions(arm_ram_ranges,
ARRAY_SIZE(arm_ram_ranges));
arm_nor_psci_write_mem_protect(0);
(void) arm_nor_psci_write_mem_protect(0);
}
/*******************************************************************************

10
plat/arm/common/arm_pm.c
View file

@ -30,11 +30,11 @@ extern unsigned int arm_pm_idle_states[];
int arm_validate_power_state(unsigned int power_state,
psci_power_state_t *req_state)
{
int pstate = psci_get_pstate_type(power_state);
int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
int i;
unsigned int pstate = psci_get_pstate_type(power_state);
unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
unsigned int i;
assert(req_state);
assert(req_state > 0U);
if (pwr_lvl > PLAT_MAX_PWR_LVL)
return PSCI_E_INVALID_PARAMS;
@ -59,7 +59,7 @@ int arm_validate_power_state(unsigned int power_state,
/*
* We expect the 'state id' to be zero.
*/
if (psci_get_pstate_id(power_state))
if (psci_get_pstate_id(power_state) != 0U)
return PSCI_E_INVALID_PARAMS;
return PSCI_E_SUCCESS;

26
plat/common/plat_psci_common.c
View file

@ -67,7 +67,7 @@ static u_register_t calc_stat_residency(unsigned long long pwrupts,
void plat_psci_stat_accounting_start(
__unused const psci_power_state_t *state_info)
{
assert(state_info);
assert(state_info != NULL);
PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_ENTER_LOW_PWR,
PMF_NO_CACHE_MAINT);
}
@ -80,7 +80,7 @@ void plat_psci_stat_accounting_start(
void plat_psci_stat_accounting_stop(
__unused const psci_power_state_t *state_info)
{
assert(state_info);
assert(state_info != NULL);
PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_EXIT_LOW_PWR,
PMF_NO_CACHE_MAINT);
}
@ -97,12 +97,12 @@ u_register_t plat_psci_stat_get_residency(unsigned int lvl,
unsigned long long pwrup_ts = 0, pwrdn_ts = 0;
unsigned int pmf_flags;
assert(lvl >= PSCI_CPU_PWR_LVL && lvl <= PLAT_MAX_PWR_LVL);
assert(state_info);
assert(last_cpu_idx >= 0 && last_cpu_idx <= PLATFORM_CORE_COUNT);
assert((lvl >= PSCI_CPU_PWR_LVL) && (lvl <= PLAT_MAX_PWR_LVL));
assert(state_info != NULL);
assert(last_cpu_idx <= PLATFORM_CORE_COUNT);
if (lvl == PSCI_CPU_PWR_LVL)
assert(last_cpu_idx == plat_my_core_pos());
assert((unsigned int)last_cpu_idx == plat_my_core_pos());
/*
* If power down is requested, then timestamp capture will
@ -110,10 +110,10 @@ u_register_t plat_psci_stat_get_residency(unsigned int lvl,
* when reading the timestamp.
*/
state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL];
if (is_local_state_off(state)) {
if (is_local_state_off(state) != 0) {
pmf_flags = PMF_CACHE_MAINT;
} else {
assert(is_local_state_retn(state));
assert(is_local_state_retn(state) == 1);
pmf_flags = PMF_NO_CACHE_MAINT;
}
@ -150,14 +150,18 @@ plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
unsigned int ncpu)
{
plat_local_state_t target = PLAT_MAX_OFF_STATE, temp;
const plat_local_state_t *st = states;
unsigned int n = ncpu;
assert(ncpu);
assert(ncpu > 0U);
do {
temp = *states++;
temp = *st;
st++;
if (temp < target)
target = temp;
} while (--ncpu);
n--;
} while (n > 0U);
return target;
}