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PSCI: Fix MISRA defects in platform code
Fix violations of MISRA C-2012 Rules 10.1, 10.3, 13.3, 14.4, 17.7 and 17.8. Change-Id: I6c9725e428b5752f1d80684ec29cb6c52a5c0c2d Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
This commit is contained in:
parent
1083b2b315
commit
2bc3dba924
4 changed files with 27 additions and 24 deletions
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@ -4,8 +4,8 @@
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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#ifndef __PLATFORM_H__
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#ifndef PLATFORM_H
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#define __PLATFORM_H__
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#define PLATFORM_H
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#include <psci.h>
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#include <psci.h>
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#include <stdint.h>
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#include <stdint.h>
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@ -401,5 +401,4 @@ unsigned int platform_get_core_pos(unsigned long mpidr) __deprecated;
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#endif /* __ENABLE_PLAT_COMPAT__ */
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#endif /* __ENABLE_PLAT_COMPAT__ */
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#endif /* __PLATFORM_H__ */
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#endif /* PLATFORM_H */
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@ -51,14 +51,14 @@ int arm_psci_read_mem_protect(int *enabled)
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******************************************************************************/
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******************************************************************************/
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int arm_nor_psci_write_mem_protect(int val)
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int arm_nor_psci_write_mem_protect(int val)
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{
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{
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int enable = (val != 0);
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int enable = (val != 0) ? 1 : 0;
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if (nor_unlock(PLAT_ARM_MEM_PROT_ADDR) != 0) {
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if (nor_unlock(PLAT_ARM_MEM_PROT_ADDR) != 0) {
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ERROR("unlocking memory protect variable\n");
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ERROR("unlocking memory protect variable\n");
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return -1;
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return -1;
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}
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}
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if (enable != 0) {
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if (enable == 1) {
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/*
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/*
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* If we want to write a value different than 0
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* If we want to write a value different than 0
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* then we have to erase the full block because
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* then we have to erase the full block because
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@ -117,14 +117,14 @@ void arm_nor_psci_do_static_mem_protect(void)
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{
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{
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int enable;
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int enable;
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arm_psci_read_mem_protect(&enable);
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(void) arm_psci_read_mem_protect(&enable);
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if (enable == 0)
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if (enable == 0)
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return;
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return;
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INFO("PSCI: Overwriting non secure memory\n");
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INFO("PSCI: Overwriting non secure memory\n");
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clear_mem_regions(arm_ram_ranges,
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clear_mem_regions(arm_ram_ranges,
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ARRAY_SIZE(arm_ram_ranges));
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ARRAY_SIZE(arm_ram_ranges));
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arm_nor_psci_write_mem_protect(0);
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(void) arm_nor_psci_write_mem_protect(0);
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}
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}
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/*******************************************************************************
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/*******************************************************************************
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@ -30,11 +30,11 @@ extern unsigned int arm_pm_idle_states[];
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int arm_validate_power_state(unsigned int power_state,
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int arm_validate_power_state(unsigned int power_state,
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psci_power_state_t *req_state)
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psci_power_state_t *req_state)
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{
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{
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int pstate = psci_get_pstate_type(power_state);
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unsigned int pstate = psci_get_pstate_type(power_state);
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int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
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unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
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int i;
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unsigned int i;
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assert(req_state);
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assert(req_state > 0U);
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if (pwr_lvl > PLAT_MAX_PWR_LVL)
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if (pwr_lvl > PLAT_MAX_PWR_LVL)
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return PSCI_E_INVALID_PARAMS;
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return PSCI_E_INVALID_PARAMS;
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@ -59,7 +59,7 @@ int arm_validate_power_state(unsigned int power_state,
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/*
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/*
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* We expect the 'state id' to be zero.
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* We expect the 'state id' to be zero.
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*/
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*/
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if (psci_get_pstate_id(power_state))
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if (psci_get_pstate_id(power_state) != 0U)
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return PSCI_E_INVALID_PARAMS;
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return PSCI_E_INVALID_PARAMS;
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return PSCI_E_SUCCESS;
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return PSCI_E_SUCCESS;
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@ -67,7 +67,7 @@ static u_register_t calc_stat_residency(unsigned long long pwrupts,
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void plat_psci_stat_accounting_start(
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void plat_psci_stat_accounting_start(
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__unused const psci_power_state_t *state_info)
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__unused const psci_power_state_t *state_info)
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{
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{
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assert(state_info);
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assert(state_info != NULL);
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PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_ENTER_LOW_PWR,
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PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_ENTER_LOW_PWR,
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PMF_NO_CACHE_MAINT);
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PMF_NO_CACHE_MAINT);
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}
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}
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@ -80,7 +80,7 @@ void plat_psci_stat_accounting_start(
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void plat_psci_stat_accounting_stop(
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void plat_psci_stat_accounting_stop(
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__unused const psci_power_state_t *state_info)
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__unused const psci_power_state_t *state_info)
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{
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{
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assert(state_info);
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assert(state_info != NULL);
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PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_EXIT_LOW_PWR,
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PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_EXIT_LOW_PWR,
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PMF_NO_CACHE_MAINT);
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PMF_NO_CACHE_MAINT);
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}
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}
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@ -97,12 +97,12 @@ u_register_t plat_psci_stat_get_residency(unsigned int lvl,
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unsigned long long pwrup_ts = 0, pwrdn_ts = 0;
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unsigned long long pwrup_ts = 0, pwrdn_ts = 0;
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unsigned int pmf_flags;
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unsigned int pmf_flags;
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assert(lvl >= PSCI_CPU_PWR_LVL && lvl <= PLAT_MAX_PWR_LVL);
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assert((lvl >= PSCI_CPU_PWR_LVL) && (lvl <= PLAT_MAX_PWR_LVL));
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assert(state_info);
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assert(state_info != NULL);
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assert(last_cpu_idx >= 0 && last_cpu_idx <= PLATFORM_CORE_COUNT);
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assert(last_cpu_idx <= PLATFORM_CORE_COUNT);
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if (lvl == PSCI_CPU_PWR_LVL)
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if (lvl == PSCI_CPU_PWR_LVL)
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assert(last_cpu_idx == plat_my_core_pos());
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assert((unsigned int)last_cpu_idx == plat_my_core_pos());
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/*
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/*
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* If power down is requested, then timestamp capture will
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* If power down is requested, then timestamp capture will
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@ -110,10 +110,10 @@ u_register_t plat_psci_stat_get_residency(unsigned int lvl,
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* when reading the timestamp.
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* when reading the timestamp.
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*/
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*/
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state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL];
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state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL];
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if (is_local_state_off(state)) {
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if (is_local_state_off(state) != 0) {
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pmf_flags = PMF_CACHE_MAINT;
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pmf_flags = PMF_CACHE_MAINT;
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} else {
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} else {
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assert(is_local_state_retn(state));
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assert(is_local_state_retn(state) == 1);
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pmf_flags = PMF_NO_CACHE_MAINT;
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pmf_flags = PMF_NO_CACHE_MAINT;
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}
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}
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@ -150,14 +150,18 @@ plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
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unsigned int ncpu)
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unsigned int ncpu)
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{
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{
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plat_local_state_t target = PLAT_MAX_OFF_STATE, temp;
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plat_local_state_t target = PLAT_MAX_OFF_STATE, temp;
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const plat_local_state_t *st = states;
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unsigned int n = ncpu;
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assert(ncpu);
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assert(ncpu > 0U);
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do {
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do {
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temp = *states++;
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temp = *st;
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st++;
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if (temp < target)
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if (temp < target)
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target = temp;
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target = temp;
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} while (--ncpu);
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n--;
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} while (n > 0U);
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return target;
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return target;
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}
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}
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