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refactor(cpus): convert Neoverse-E1 to framework

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For E1, this involves replacing:
  - The reset_func with the standard cpu_reset_func_{start,end}
    to apply errata automatically
  - The <cpu>_errata_report with the errata_report_shim to
    report errata automatically
And for the E1 DSU erratum, creating symbolic names to the already
existing errata workaround functions to get them registered under
the Errata Framework.

Testing was conducted by:
  - Manual comparison of disassembly of converted functions with non-
    converted functions:

    aarch64-none-elf-objdump -D
    <trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf
      vs
    aarch64-none-elf-objdump -D
    <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

  - Build for debug with all errata enabled and step through ArmDS
    to ensure all functions are entered and the path remains the same
    as before conversion to the new framework.

Change-Id: I0a059574948badbd108333344286c76aeb142e71
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
This commit is contained in:
laurenw-arm 2023-06-06 15:17:27 -05:00
parent 2503c8f320
commit 291bb2f4d0
1 changed files with 13 additions and 35 deletions
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46
lib/cpus/aarch64/neoverse_e1.S
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -21,20 +21,18 @@
#error "Neoverse-E1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
#endif
/* -------------------------------------------------
* The CPU Ops reset function for Neoverse-E1.
* Shall clobber: x0-x19
* -------------------------------------------------
/*
* ERRATA_DSU_936184:
* The errata is defined in dsu_helpers.S and applies to neoverse_e1.
* Henceforth creating symbolic names to the already existing errata
* workaround functions to get them registered under the Errata Framework.
*/
func neoverse_e1_reset_func
mov x19, x30
.equ check_erratum_neoverse_e1_936184, check_errata_dsu_936184
.equ erratum_neoverse_e1_936184_wa, errata_dsu_936184_wa
add_erratum_entry neoverse_e1, ERRATUM(936184), ERRATA_DSU_936184, APPLY_AT_RESET
#if ERRATA_DSU_936184
bl errata_dsu_936184_wa
#endif
ret x19
endfunc neoverse_e1_reset_func
cpu_reset_func_start neoverse_e1
cpu_reset_func_end neoverse_e1
func neoverse_e1_cpu_pwr_dwn
mrs x0, NEOVERSE_E1_CPUPWRCTLR_EL1
@ -44,27 +42,7 @@ func neoverse_e1_cpu_pwr_dwn
ret
endfunc neoverse_e1_cpu_pwr_dwn
#if REPORT_ERRATA
/*
* Errata printing function for Neoverse N1. Must follow AAPCS.
*/
func neoverse_e1_errata_report
stp x8, x30, [sp, #-16]!
bl cpu_get_rev_var
mov x8, x0
/*
* Report all errata. The revision-variant information is passed to
* checking functions of each errata.
*/
report_errata ERRATA_DSU_936184, neoverse_e1, dsu_936184
ldp x8, x30, [sp], #16
ret
endfunc neoverse_e1_errata_report
#endif
errata_report_shim neoverse_e1
.section .rodata.neoverse_e1_regs, "aS"
neoverse_e1_regs: /* The ascii list of register names to be reported */