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SPMD: save/restore EL2 system registers.
NOTE: Not all EL-2 system registers are saved/restored. This subset includes registers recognized by ARMv8.0 Change-Id: I9993c7d78d8f5f8e72d1c6c8d6fd871283aa3ce0 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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Max Shvetsov
parent
2403813779
commit
28f39f02ad
8 changed files with 608 additions and 36 deletions
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@ -135,10 +135,88 @@
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#define CTX_MTE_REGS_END CTX_TIMER_SYSREGS_END
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#endif /* CTX_INCLUDE_MTE_REGS */
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/*
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* S-EL2 register set
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*/
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#if CTX_INCLUDE_EL2_REGS
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/* For later discussion
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* ICH_AP0R<n>_EL2
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* ICH_AP1R<n>_EL2
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* AMEVCNTVOFF0<n>_EL2
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* AMEVCNTVOFF1<n>_EL2
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* ICH_LR<n>_EL2
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*/
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#define CTX_ACTLR_EL2 (CTX_MTE_REGS_END + U(0x0))
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#define CTX_AFSR0_EL2 (CTX_MTE_REGS_END + U(0x8))
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#define CTX_AFSR1_EL2 (CTX_MTE_REGS_END + U(0x10))
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#define CTX_AMAIR_EL2 (CTX_MTE_REGS_END + U(0x18))
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#define CTX_CNTHCTL_EL2 (CTX_MTE_REGS_END + U(0x20))
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#define CTX_CNTHP_CTL_EL2 (CTX_MTE_REGS_END + U(0x28))
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#define CTX_CNTHP_CVAL_EL2 (CTX_MTE_REGS_END + U(0x30))
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#define CTX_CNTHP_TVAL_EL2 (CTX_MTE_REGS_END + U(0x38))
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#define CTX_CNTPOFF_EL2 (CTX_MTE_REGS_END + U(0x40))
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#define CTX_CNTVOFF_EL2 (CTX_MTE_REGS_END + U(0x48))
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#define CTX_CPTR_EL2 (CTX_MTE_REGS_END + U(0x50))
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#define CTX_DBGVCR32_EL2 (CTX_MTE_REGS_END + U(0x58))
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#define CTX_ELR_EL2 (CTX_MTE_REGS_END + U(0x60))
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#define CTX_ESR_EL2 (CTX_MTE_REGS_END + U(0x68))
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#define CTX_FAR_EL2 (CTX_MTE_REGS_END + U(0x70))
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#define CTX_FPEXC32_EL2 (CTX_MTE_REGS_END + U(0x78))
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#define CTX_HACR_EL2 (CTX_MTE_REGS_END + U(0x80))
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#define CTX_HAFGRTR_EL2 (CTX_MTE_REGS_END + U(0x88))
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#define CTX_HCR_EL2 (CTX_MTE_REGS_END + U(0x90))
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#define CTX_HDFGRTR_EL2 (CTX_MTE_REGS_END + U(0x98))
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#define CTX_HDFGWTR_EL2 (CTX_MTE_REGS_END + U(0xA0))
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#define CTX_HFGITR_EL2 (CTX_MTE_REGS_END + U(0xA8))
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#define CTX_HFGRTR_EL2 (CTX_MTE_REGS_END + U(0xB0))
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#define CTX_HFGWTR_EL2 (CTX_MTE_REGS_END + U(0xB8))
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#define CTX_HPFAR_EL2 (CTX_MTE_REGS_END + U(0xC0))
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#define CTX_HSTR_EL2 (CTX_MTE_REGS_END + U(0xC8))
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#define CTX_ICC_SRE_EL2 (CTX_MTE_REGS_END + U(0xD0))
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#define CTX_ICH_EISR_EL2 (CTX_MTE_REGS_END + U(0xD8))
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#define CTX_ICH_ELRSR_EL2 (CTX_MTE_REGS_END + U(0xE0))
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#define CTX_ICH_HCR_EL2 (CTX_MTE_REGS_END + U(0xE8))
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#define CTX_ICH_MISR_EL2 (CTX_MTE_REGS_END + U(0xF0))
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#define CTX_ICH_VMCR_EL2 (CTX_MTE_REGS_END + U(0xF8))
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#define CTX_ICH_VTR_EL2 (CTX_MTE_REGS_END + U(0x100))
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#define CTX_MAIR_EL2 (CTX_MTE_REGS_END + U(0x108))
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#define CTX_MDCR_EL2 (CTX_MTE_REGS_END + U(0x110))
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#define CTX_MPAM2_EL2 (CTX_MTE_REGS_END + U(0x118))
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#define CTX_MPAMHCR_EL2 (CTX_MTE_REGS_END + U(0x120))
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#define CTX_MPAMVPM0_EL2 (CTX_MTE_REGS_END + U(0x128))
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#define CTX_MPAMVPM1_EL2 (CTX_MTE_REGS_END + U(0x130))
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#define CTX_MPAMVPM2_EL2 (CTX_MTE_REGS_END + U(0x138))
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#define CTX_MPAMVPM3_EL2 (CTX_MTE_REGS_END + U(0x140))
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#define CTX_MPAMVPM4_EL2 (CTX_MTE_REGS_END + U(0x148))
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#define CTX_MPAMVPM5_EL2 (CTX_MTE_REGS_END + U(0x150))
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#define CTX_MPAMVPM6_EL2 (CTX_MTE_REGS_END + U(0x158))
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#define CTX_MPAMVPM7_EL2 (CTX_MTE_REGS_END + U(0x160))
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#define CTX_MPAMVPMV_EL2 (CTX_MTE_REGS_END + U(0x168))
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#define CTX_RMR_EL2 (CTX_MTE_REGS_END + U(0x170))
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#define CTX_SCTLR_EL2 (CTX_MTE_REGS_END + U(0x178))
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#define CTX_SPSR_EL2 (CTX_MTE_REGS_END + U(0x180))
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#define CTX_SP_EL2 (CTX_MTE_REGS_END + U(0x188))
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#define CTX_TCR_EL2 (CTX_MTE_REGS_END + U(0x190))
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#define CTX_TPIDR_EL2 (CTX_MTE_REGS_END + U(0x198))
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#define CTX_TTBR0_EL2 (CTX_MTE_REGS_END + U(0x1A0))
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#define CTX_VBAR_EL2 (CTX_MTE_REGS_END + U(0x1A8))
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#define CTX_VMPIDR_EL2 (CTX_MTE_REGS_END + U(0x1B0))
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#define CTX_VPIDR_EL2 (CTX_MTE_REGS_END + U(0x1B8))
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#define CTX_VTCR_EL2 (CTX_MTE_REGS_END + U(0x1C0))
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#define CTX_VTTBR_EL2 (CTX_MTE_REGS_END + U(0x1C8))
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#define CTX_ZCR_EL2 (CTX_MTE_REGS_END + U(0x1B0))
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/* Align to the next 16 byte boundary */
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#define CTX_EL2_REGS_END (CTX_MTE_REGS_END + U(0x1C0))
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#else
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#define CTX_EL2_REGS_END CTX_MTE_REGS_END
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#endif /* CTX_INCLUDE_EL2_REGS */
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/*
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* End of system registers.
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*/
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#define CTX_SYSREGS_END CTX_MTE_REGS_END
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#define CTX_SYSREGS_END CTX_EL2_REGS_END
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/*******************************************************************************
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* Constants that allow assembler code to access members of and the 'fp_regs'
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@ -255,11 +333,10 @@
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DEFINE_REG_STRUCT(gp_regs, CTX_GPREG_ALL);
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/*
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* AArch64 EL1 system register context structure for preserving the
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* architectural state during switches from one security state to
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* another in EL1.
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* AArch64 EL1/EL2 system register context structure for preserving the
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* architectural state during world switches.
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*/
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DEFINE_REG_STRUCT(el1_sys_regs, CTX_SYSREG_ALL);
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DEFINE_REG_STRUCT(sys_regs, CTX_SYSREG_ALL);
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/*
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* AArch64 floating point register context structure for preserving
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@ -304,7 +381,7 @@ DEFINE_REG_STRUCT(pauth, CTX_PAUTH_REGS_ALL);
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typedef struct cpu_context {
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gp_regs_t gpregs_ctx;
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el3_state_t el3state_ctx;
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el1_sys_regs_t sysregs_ctx;
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sys_regs_t sysregs_ctx;
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#if CTX_INCLUDE_FPREGS
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fp_regs_t fpregs_ctx;
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#endif
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@ -387,8 +464,14 @@ CASSERT(CTX_PAUTH_REGS_OFFSET == __builtin_offsetof(cpu_context_t, pauth_ctx), \
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/*******************************************************************************
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* Function prototypes
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******************************************************************************/
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void el1_sysregs_context_save(el1_sys_regs_t *regs);
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void el1_sysregs_context_restore(el1_sys_regs_t *regs);
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void el1_sysregs_context_save(sys_regs_t *regs);
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void el1_sysregs_context_restore(sys_regs_t *regs);
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#if CTX_INCLUDE_EL2_REGS
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void el2_sysregs_context_save(sys_regs_t *regs);
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void el2_sysregs_context_restore(sys_regs_t *regs);
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#endif
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#if CTX_INCLUDE_FPREGS
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void fpregs_context_save(fp_regs_t *regs);
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void fpregs_context_restore(fp_regs_t *regs);
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@ -36,6 +36,11 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep);
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void cm_prepare_el3_exit(uint32_t security_state);
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#ifdef __aarch64__
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#if CTX_INCLUDE_EL2_REGS
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void cm_el2_sysregs_context_save(uint32_t security_state);
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void cm_el2_sysregs_context_restore(uint32_t security_state);
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#endif
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void cm_el1_sysregs_context_save(uint32_t security_state);
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void cm_el1_sysregs_context_restore(uint32_t security_state);
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void cm_set_elr_el3(uint32_t security_state, uintptr_t entrypoint);
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