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Merge changes from topic "plat_gpt_setup" into integration

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* changes:
  feat(arm): move GPT setup to common BL source
  feat(arm): retrieve GPT related data from platform
  refactor(arm): rename L0/L1 GPT base macros
This commit is contained in:
Manish V Badarkhe 2024-01-30 12:13:14 +01:00 • committed by TrustedFirmware Code Review
commit 28c79e1013
8 changed files with 109 additions and 66 deletions
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4
docs/components/granule-protection-tables-design.rst
View file

@ -80,8 +80,8 @@ structure used by the granule transition service which will be covered more
below.
In the reference implementation for FVP models, you can find an example of PAS
region definitions in the file ``include/plat/arm/common/arm_pas_def.h``. Table
creation API calls can be found in ``plat/arm/common/arm_bl2_setup.c`` and
region definitions in the file ``plat/arm/board/fvp/include/fvp_pas_def.h``.
Table creation API calls can be found in ``plat/arm/common/arm_common.c`` and
runtime initialization API calls can be seen in
``plat/arm/common/arm_bl31_setup.c``.

12
include/plat/arm/common/arm_def.h
View file

@ -150,10 +150,10 @@ MEASURED_BOOT
#endif /* (SPD_tspd || SPD_opteed || SPD_spmd) && MEASURED_BOOT */
#if ENABLE_RME
#define ARM_L1_GPT_ADDR_BASE (ARM_DRAM1_BASE + \
#define ARM_L1_GPT_BASE (ARM_DRAM1_BASE + \
ARM_DRAM1_SIZE - \
ARM_L1_GPT_SIZE)
#define ARM_L1_GPT_END (ARM_L1_GPT_ADDR_BASE + \
#define ARM_L1_GPT_END (ARM_L1_GPT_BASE + \
ARM_L1_GPT_SIZE - 1U)
#define ARM_REALM_BASE (ARM_EL3_RMM_SHARED_BASE - \
@ -343,7 +343,7 @@ MEASURED_BOOT
#define ARM_MAP_GPT_L1_DRAM MAP_REGION_FLAT( \
ARM_L1_GPT_ADDR_BASE, \
ARM_L1_GPT_BASE, \
ARM_L1_GPT_SIZE, \
MT_MEMORY | MT_RW | EL3_PAS)
@ -422,7 +422,7 @@ MEASURED_BOOT
* Map L0_GPT with read and write permissions
*/
#if ENABLE_RME
#define ARM_MAP_L0_GPT_REGION MAP_REGION_FLAT(ARM_L0_GPT_ADDR_BASE, \
#define ARM_MAP_L0_GPT_REGION MAP_REGION_FLAT(ARM_L0_GPT_BASE, \
ARM_L0_GPT_SIZE, \
MT_MEMORY | MT_RW | MT_ROOT)
#endif
@ -533,8 +533,8 @@ MEASURED_BOOT
* configuration memory, 4KB aligned.
*/
#define ARM_L0_GPT_SIZE (PAGE_SIZE)
#define ARM_L0_GPT_ADDR_BASE (ARM_FW_CONFIGS_LIMIT)
#define ARM_L0_GPT_LIMIT (ARM_L0_GPT_ADDR_BASE + ARM_L0_GPT_SIZE)
#define ARM_L0_GPT_BASE (ARM_FW_CONFIGS_LIMIT)
#define ARM_L0_GPT_LIMIT (ARM_L0_GPT_BASE + ARM_L0_GPT_SIZE)
#else
#define ARM_L0_GPT_SIZE U(0)
#endif

17
include/plat/arm/common/plat_arm.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -13,6 +13,7 @@
#include <lib/bakery_lock.h>
#include <lib/cassert.h>
#include <lib/el3_runtime/cpu_data.h>
#include <lib/gpt_rme/gpt_rme.h>
#include <lib/spinlock.h>
#include <lib/utils_def.h>
#include <lib/xlat_tables/xlat_tables_compat.h>
@ -31,6 +32,17 @@ typedef struct arm_tzc_regions_info {
unsigned int nsaid_permissions;
} arm_tzc_regions_info_t;
typedef struct arm_gpt_info {
pas_region_t *pas_region_base;
unsigned int pas_region_count;
uintptr_t l0_base;
uintptr_t l1_base;
size_t l0_size;
size_t l1_size;
gpccr_pps_e pps;
gpccr_pgs_e pgs;
} arm_gpt_info_t;
/*******************************************************************************
* Default mapping definition of the TrustZone Controller for ARM standard
* platforms.
@ -362,6 +374,9 @@ int plat_arm_get_alt_image_source(
unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
const mmap_region_t *plat_arm_get_mmap(void);
const arm_gpt_info_t *plat_arm_get_gpt_info(void);
void arm_gpt_setup(void);
/* Allow platform to override psci_pm_ops during runtime */
const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops);

36
plat/arm/board/fvp/fvp_bl2_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,6 +9,7 @@
#include <common/debug.h>
#include <common/desc_image_load.h>
#include <drivers/arm/sp804_delay_timer.h>
#include <fvp_pas_def.h>
#include <lib/fconf/fconf.h>
#include <lib/fconf/fconf_dyn_cfg_getter.h>
#include <lib/transfer_list.h>
@ -21,6 +22,32 @@
static struct transfer_list_header *ns_tl __unused;
#if ENABLE_RME
/*
* The GPT library might modify the gpt regions structure to optimize
* the layout, so the array cannot be constant.
*/
static pas_region_t pas_regions[] = {
ARM_PAS_KERNEL,
ARM_PAS_SECURE,
ARM_PAS_REALM,
ARM_PAS_EL3_DRAM,
ARM_PAS_GPTS,
ARM_PAS_KERNEL_1
};
static const arm_gpt_info_t arm_gpt_info = {
.pas_region_base = pas_regions,
.pas_region_count = (unsigned int)ARRAY_SIZE(pas_regions),
.l0_base = (uintptr_t)ARM_L0_GPT_BASE,
.l1_base = (uintptr_t)ARM_L1_GPT_BASE,
.l0_size = (size_t)ARM_L0_GPT_SIZE,
.l1_size = (size_t)ARM_L1_GPT_SIZE,
.pps = GPCCR_PPS_64GB,
.pgs = GPCCR_PGS_4K
};
#endif
void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3)
{
arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1);
@ -41,6 +68,13 @@ void bl2_platform_setup(void)
fvp_timer_init();
}
#if ENABLE_RME
const arm_gpt_info_t *plat_arm_get_gpt_info(void)
{
return &arm_gpt_info;
}
#endif /* ENABLE_RME */
/*******************************************************************************
* This function returns the list of executable images
******************************************************************************/

3
plat/arm/board/fvp/fvp_common.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -24,7 +24,6 @@
#endif
#include <plat/arm/common/arm_config.h>
#include <plat/arm/common/arm_pas_def.h>
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>

12
include/plat/arm/common/arm_pas_def.h → plat/arm/board/fvp/include/fvp_pas_def.h
View file

@ -1,13 +1,13 @@
/*
* Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2021-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef ARM_PAS_DEF_H
#define ARM_PAS_DEF_H
#ifndef FVP_PAS_DEF_H
#define FVP_PAS_DEF_H
#include <lib/gpt_rme/gpt_rme.h>
#include <plat/arm/common/arm_def.h>
#include <platform_def.h>
/*****************************************************************************
* PAS regions used to initialize the Granule Protection Table (GPT)
@ -107,11 +107,11 @@
ARM_EL3_TZC_DRAM1_SIZE, \
GPT_GPI_ROOT)
#define ARM_PAS_GPTS GPT_MAP_REGION_GRANULE(ARM_L1_GPT_ADDR_BASE, \
#define ARM_PAS_GPTS GPT_MAP_REGION_GRANULE(ARM_L1_GPT_BASE, \
ARM_L1_GPT_SIZE, \
GPT_GPI_ROOT)
/* GPT Configuration options */
#define PLATFORM_L0GPTSZ GPCCR_L0GPTSZ_30BITS
#endif /* ARM_PAS_DEF_H */
#endif /* FVP_PAS_DEF_H */

49
plat/arm/common/arm_bl2_setup.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -23,9 +23,6 @@
#include <lib/optee_utils.h>
#endif
#include <lib/utils.h>
#if ENABLE_RME
#include <plat/arm/common/arm_pas_def.h>
#endif
#include <plat/arm/common/plat_arm.h>
#include <plat/common/platform.h>
@ -134,48 +131,6 @@ void bl2_platform_setup(void)
arm_bl2_platform_setup();
}
#if ENABLE_RME
static void arm_bl2_plat_gpt_setup(void)
{
/*
* The GPT library might modify the gpt regions structure to optimize
* the layout, so the array cannot be constant.
*/
pas_region_t pas_regions[] = {
ARM_PAS_KERNEL,
ARM_PAS_SECURE,
ARM_PAS_REALM,
ARM_PAS_EL3_DRAM,
ARM_PAS_GPTS,
ARM_PAS_KERNEL_1
};
/* Initialize entire protected space to GPT_GPI_ANY. */
if (gpt_init_l0_tables(GPCCR_PPS_64GB, ARM_L0_GPT_ADDR_BASE,
ARM_L0_GPT_SIZE) < 0) {
ERROR("gpt_init_l0_tables() failed!\n");
panic();
}
/* Carve out defined PAS ranges. */
if (gpt_init_pas_l1_tables(GPCCR_PGS_4K,
ARM_L1_GPT_ADDR_BASE,
ARM_L1_GPT_SIZE,
pas_regions,
(unsigned int)(sizeof(pas_regions) /
sizeof(pas_region_t))) < 0) {
ERROR("gpt_init_pas_l1_tables() failed!\n");
panic();
}
INFO("Enabling Granule Protection Checks\n");
if (gpt_enable() < 0) {
ERROR("gpt_enable() failed!\n");
panic();
}
}
#endif /* ENABLE_RME */
/*******************************************************************************
* Perform the very early platform specific architectural setup here.
* When RME is enabled the secure environment is initialised before
@ -216,7 +171,7 @@ void arm_bl2_plat_arch_setup(void)
enable_mmu_el3(0);
/* Initialise and enable granule protection after MMU. */
arm_bl2_plat_gpt_setup();
arm_gpt_setup();
#else
enable_mmu_el1(0);
#endif

42
plat/arm/common/arm_common.c
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -241,3 +241,43 @@ const mmap_region_t *plat_get_addr_mmap(void)
{
return plat_arm_mmap;
}
#if ENABLE_RME
void arm_gpt_setup(void)
{
/*
* It is to be noted that any Arm platform that reuses arm_gpt_setup
* must implement plat_arm_get_gpt_info within its platform code
*/
const arm_gpt_info_t *arm_gpt_info =
plat_arm_get_gpt_info();
if (arm_gpt_info == NULL) {
ERROR("arm_gpt_info not initialized!!\n");
panic();
}
/* Initialize entire protected space to GPT_GPI_ANY. */
if (gpt_init_l0_tables(arm_gpt_info->pps, arm_gpt_info->l0_base,
arm_gpt_info->l0_size) < 0) {
ERROR("gpt_init_l0_tables() failed!\n");
panic();
}
/* Carve out defined PAS ranges. */
if (gpt_init_pas_l1_tables(arm_gpt_info->pgs,
arm_gpt_info->l1_base,
arm_gpt_info->l1_size,
arm_gpt_info->pas_region_base,
arm_gpt_info->pas_region_count) < 0) {
ERROR("gpt_init_pas_l1_tables() failed!\n");
panic();
}
INFO("Enabling Granule Protection Checks\n");
if (gpt_enable() < 0) {
ERROR("gpt_enable() failed!\n");
panic();
}
}
#endif /* ENABLE_RME */