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feat(cpufeat): add memory retention bit define for CLUSTERPWRDN

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Bit1 in the CLUSTERPWRDN register is used to indicate on CLUSTERPACTIVE
that memory retention is required or not. It can be used for
L3 cache memory retention support.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I1c53c90ae3dfbed3be7e5b2b79f2c3565db81012
This commit is contained in:
Jacky Bai 2023-09-13 09:21:40 +08:00
parent bc6bd65bf0
commit 278beb894a
2 changed files with 2 additions and 0 deletions
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1
include/arch/aarch32/arch.h
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@ -796,5 +796,6 @@
#define DSU_CLUSTER_PWR_OFF 0
#define DSU_CLUSTER_PWR_ON 1
#define DSU_CLUSTER_PWR_MASK U(1)
#define DSU_CLUSTER_MEM_RET BIT(1)
#endif /* ARCH_H */

1
include/arch/aarch64/arch.h
View file

@ -1414,6 +1414,7 @@
#define DSU_CLUSTER_PWR_OFF 0
#define DSU_CLUSTER_PWR_ON 1
#define DSU_CLUSTER_PWR_MASK U(1)
#define DSU_CLUSTER_MEM_RET BIT(1)
/*******************************************************************************
* Definitions for CPU Power/Performance Management registers