From 1ce2c745a8b471dcc9e9f64e2163add566f5ce69 Mon Sep 17 00:00:00 2001 From: Jagdish Gediya Date: Tue, 3 Sep 2024 10:44:47 +0000 Subject: [PATCH] feat(tc): update CPU PMU nodes for tc4 CPU PMU types are not same for all CPUs on TC platforms, so define the PMU node per microarchitecture. Signed-off-by: Jagdish Gediya Signed-off-by: Icen.Zeyada Change-Id: Ibbe8dacda695ccb45965c7f4680d4b03cffdb815 --- fdts/tc4.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/fdts/tc4.dts b/fdts/tc4.dts index 98cfea16f..7a2f174d9 100644 --- a/fdts/tc4.dts +++ b/fdts/tc4.dts @@ -13,9 +13,9 @@ #define MHU_TX_ADDR 46240000 /* hex */ #define MHU_RX_ADDR 46250000 /* hex */ -#define LIT_CPU_PMU_COMPATIBLE "arm,armv8-pmuv3" -#define MID_CPU_PMU_COMPATIBLE "arm,armv8-pmuv3" -#define BIG_CPU_PMU_COMPATIBLE "arm,armv8-pmuv3" +#define LIT_CPU_PMU_COMPATIBLE "arm,nevis-pmu" +#define MID_CPU_PMU_COMPATIBLE "arm,gelas-pmu" +#define BIG_CPU_PMU_COMPATIBLE "arm,travis-pmu" #define RSE_MHU_TX_ADDR 49020000 /* hex */ #define RSE_MHU_RX_ADDR 49030000 /* hex */