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fix(cpus): workaround for Cortex-A715 erratum 2429384

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Cortex-A715 erratum 2429384 is a cat B erratum that applies to
revision r1p0 and is fixed in r1p1. The workaround is to set
bit[27] of CPUACTLR2_EL1. There is no workaround for revision
r0p0.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2148827/latest

Change-Id: I3cdb1b71567542174759f6946e9c81f77d0d993d
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
This commit is contained in:
Bipin Ravi 2024-02-27 17:14:22 -06:00
parent 7f69a40697
commit 262dc9f760
4 changed files with 18 additions and 3 deletions
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4
docs/design/cpu-specific-build-macros.rst
View file

@ -876,6 +876,10 @@ For Cortex-A520, the following errata build flags are defined :
For Cortex-A715, the following errata build flags are defined : For Cortex-A715, the following errata build flags are defined :
- ``ERRATA_A715_2429384``: This applies errata 2429384 workaround to
Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no
workaround for revision r0p0. It is fixed in r1p1.
- ``ERRATA_A715_2561034``: This applies errata 2561034 workaround to - ``ERRATA_A715_2561034``: This applies errata 2561034 workaround to
Cortex-A715 CPU. This needs to be enabled only for revision r1p0. Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
It is fixed in r1p1. It is fixed in r1p1.

6
lib/cpus/aarch64/cortex_a715.S
View file

@ -26,6 +26,12 @@
wa_cve_2022_23960_bhb_vector_table CORTEX_A715_BHB_LOOP_COUNT, cortex_a715 wa_cve_2022_23960_bhb_vector_table CORTEX_A715_BHB_LOOP_COUNT, cortex_a715
#endif /* WORKAROUND_CVE_2022_23960 */ #endif /* WORKAROUND_CVE_2022_23960 */
workaround_reset_start cortex_a715, ERRATUM(2429384), ERRATA_A715_2429384
sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(27)
workaround_reset_end cortex_a715, ERRATUM(2429384)
check_erratum_range cortex_a715, ERRATUM(2429384), CPU_REV(1, 0), CPU_REV(1, 0)
workaround_runtime_start cortex_a715, ERRATUM(2561034), ERRATA_A715_2561034 workaround_runtime_start cortex_a715, ERRATUM(2561034), ERRATA_A715_2561034
sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(26) sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(26)
workaround_runtime_end cortex_a715, ERRATUM(2561034), NO_ISB workaround_runtime_end cortex_a715, ERRATUM(2561034), NO_ISB

4
lib/cpus/cpu-ops.mk
View file

@ -907,6 +907,10 @@ CPU_FLAG_LIST += ERRATA_V2_2779510
# This erratum applies to revisions r0p0, r0p1. Fixed in r0p2. # This erratum applies to revisions r0p0, r0p1. Fixed in r0p2.
CPU_FLAG_LIST += ERRATA_V2_2801372 CPU_FLAG_LIST += ERRATA_V2_2801372
# Flag to apply erratum 2429384 workaround during reset. This erratum applies
# to revision r1p0. There is no workaround for r0p0. It is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A715_2429384
# Flag to apply erratum 2561034 workaround during reset. This erratum applies # Flag to apply erratum 2561034 workaround during reset. This erratum applies
# only to revision r1p0. It is fixed in r1p1. # only to revision r1p0. It is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A715_2561034 CPU_FLAG_LIST += ERRATA_A715_2561034

7
services/std_svc/errata_abi/errata_abi_main.c
View file

@ -435,10 +435,11 @@ struct em_cpu_list cpu_list[] = {
{ {
.cpu_partnumber = CORTEX_A715_MIDR, .cpu_partnumber = CORTEX_A715_MIDR,
.cpu_errata_list = { .cpu_errata_list = {
[0] = {2561034, 0x10, 0x10, ERRATA_A715_2561034}, [0] = {2429384, 0x00, 0x10, ERRATA_A715_2429384},
[1] = {2701951, 0x00, 0x11, ERRATA_A715_2701951, \ [1] = {2561034, 0x10, 0x10, ERRATA_A715_2561034},
[2] = {2701951, 0x00, 0x11, ERRATA_A715_2701951, \
ERRATA_NON_ARM_INTERCONNECT}, ERRATA_NON_ARM_INTERCONNECT},
[2 ... ERRATA_LIST_END] = UNDEF_ERRATA, [3 ... ERRATA_LIST_END] = UNDEF_ERRATA,
} }
}, },
#endif /* CORTEX_A715_H_INC */ #endif /* CORTEX_A715_H_INC */