mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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doc: Reformat platform port documents
The platform port documents are not very standardised right now and they don't integrate properly into the document tree so: 1) Make sure each port has a proper name and title (incl. owner) 2) Correct use of headings, subheadings, etc in each port 3) Resolve any naming conflicts between documents Change-Id: I4c2da6f57172b7f2af3512e766ae9ce3b840b50f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
This commit is contained in:
Paul Beesley
parent
83993177d9
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24dba2b39f
22 changed files with 118 additions and 111 deletions
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@ -1,5 +1,5 @@
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Trusted Firmware-A for Allwinner ARMv8 SoCs
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===========================================
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Allwinner ARMv8 SoCs
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====================
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Trusted Firmware-A (TF-A) implements the EL3 firmware layer for Allwinner
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SoCs with ARMv8 cores. Only BL31 is used to provide proper EL3 setup and
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@ -37,11 +37,10 @@ To build for machines with an H6 SoC:
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.. _U-Boot documentation: http://git.denx.de/?p=u-boot.git;f=board/sunxi/README.sunxi64;hb=HEAD
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Trusted OS dispatcher
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=====================
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---------------------
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One can boot Trusted OS(OP-TEE OS, bl32 image) along side bl31 image on Allwinner A64.
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In order to include the 'opteed' dispatcher in the image, pass 'SPD=opteed' on the command line
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while compiling the bl31 image and make sure the loader (SPL) loads the Trusted OS binary to
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the beginning of DRAM (0x40000000).
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@ -1,5 +1,5 @@
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Description
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===========
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Arm Versatile Express
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=====================
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Versatile Express (VE) family development platform provides an
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ultra fast environment for prototyping arm-v7 System-on-Chip designs.
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@ -9,21 +9,21 @@ and Cortex-A7 VE FVP's. This platform is tested on and only expected to work
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with single core models.
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Boot Sequence
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=============
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-------------
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BL1 --> BL2 --> BL32(sp_min) --> BL33(u-boot) --> Linux kernel
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How to build
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============
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------------
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Code Locations
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---------------
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~~~~~~~~~~~~~~
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- `U-boot <https://git.linaro.org/landing-teams/working/arm/u-boot.git>`__
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- `arm-trusted-firmware <https://github.com/ARM-software/arm-trusted-firmware>`__
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Build Procedure
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---------------
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~~~~~~~~~~~~~~~
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- Obtain arm toolchain. The software stack has been verified with linaro 6.2
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`arm-linux-gnueabihf <https://releases.linaro.org/components/toolchain/binaries/6.2-2016.11/arm-linux-gnueabihf/>`__.
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@ -68,7 +68,7 @@ Build Procedure
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BL33=<path_to_u-boot.bin> all fip
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Run Procedure
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-------------
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~~~~~~~~~~~~~
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The following model parameters should be used to boot Linux using the build of
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arm-trusted-firmware-a made using the above make commands:
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@ -1,5 +1,5 @@
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Description
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===========
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NXP i.MX 8 Series
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=================
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The i.MX 8 series of applications processors is a feature- and
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performance-scalable multi-core platform that includes single-,
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@ -20,15 +20,15 @@ control for system-level resources on i.MX8. The heart of the system
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controller is a Cortex-M4 that executes system controller firmware.
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Boot Sequence
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=============
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-------------
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Bootrom --> BL31 --> BL33(u-boot) --> Linux kernel
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How to build
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============
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------------
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Build Procedure
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---------------
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~~~~~~~~~~~~~~~
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- Prepare AARCH64 toolchain.
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@ -46,7 +46,7 @@ Build Procedure
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Target_SoC should be "imx8qx" for i.MX8QX SoC.
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Deploy TF-A Images
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-----------------
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~~~~~~~~~~~~~~~~~~
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TF-A binary(bl31.bin), scfw_tcm.bin and u-boot.bin are combined together
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to generate a binary file called flash.bin, the imx-mkimage tool is used
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@ -1,5 +1,5 @@
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Description
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===========
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NXP i.MX 8M Series
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==================
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The i.MX 8M family of applications processors based on Arm Corte-A53 and Cortex-M4
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cores provide high-performance computing, power efficiency, enhanced system
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@ -7,15 +7,15 @@ reliability and embedded security needed to drive the growth of fast-growing
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edge node computing, streaming multimedia, and machine learning applications.
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Boot Sequence
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=============
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-------------
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Bootrom --> SPL --> BL31 --> BL33(u-boot) --> Linux kernel
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How to build
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============
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------------
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Build Procedure
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---------------
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~~~~~~~~~~~~~~~
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- Prepare AARCH64 toolchain.
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@ -34,7 +34,7 @@ Build Procedure
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Target_SoC should be "imx8mm" for i.MX8MM SoC.
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Deploy TF-A Images
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-----------------
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~~~~~~~~~~~~~~~~~~
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TF-A binary(bl31.bin), u-boot-spl.bin u-boot-nodtb.bin and dtb are combined
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together to generate a binary file called flash.bin, the imx-mkimage tool is
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@ -16,7 +16,6 @@ Platform Ports
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meson-gxl
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mt8183
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nvidia-tegra
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poplar
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qemu
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rcar-gen3
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rockchip
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@ -26,4 +25,5 @@ Platform Ports
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synquacer
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ti-k3
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warp7
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xilinx-versal
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xilinx-zynqmp
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@ -1,5 +1,5 @@
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Description
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===========
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Intel Stratix 10 SoCFPGA
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========================
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Stratix 10 SoCFPGA is a FPGA with integrated quad-core 64-bit Arm Cortex A53 processor.
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@ -11,10 +11,10 @@ the hardware, then loads bl31 and bl33 (UEFI) into DDR and boots to bl33.
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Boot ROM --> Trusted Firmware-A --> UEFI
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How to build
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============
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------------
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Code Locations
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--------------
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~~~~~~~~~~~~~~
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- Trusted Firmware-A:
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`link <https://github.com/ARM-software/arm-trusted-firmware>`__
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@ -23,7 +23,7 @@ Code Locations
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`link <https://github.com/altera-opensource/uefi-socfpga>`__
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Build Procedure
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---------------
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~~~~~~~~~~~~~~~
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- Fetch all the above 2 repositories into local host.
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Make all the repositories in the same ${BUILD\_PATH}.
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@ -45,7 +45,7 @@ Build Procedure
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BL33=PEI.ROM
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Install Procedure
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-----------------
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~~~~~~~~~~~~~~~~~
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- dd fip.bin to a A2 partition on the MMC drive to be booted in Stratix 10
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board.
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@ -53,16 +53,18 @@ Install Procedure
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- Generate a SOF containing bl2
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.. code:: bash
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aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses 0xffe00000 bl2.bin bl2.hex
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quartus_cpf --bootloader bl2.hex <quartus_generated_sof> <output_sof_with_bl2>
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- Configure SOF to board
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.. code:: bash
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nios2-configure-sof <output_sof_with_bl2>
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Boot trace
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==========
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----------
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::
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INFO: DDR: DRAM calibration success.
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@ -1,5 +1,5 @@
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Description
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===========
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NXP QorIQ® LS1043A
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==================
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The QorIQ® LS1043A processor is NXP's first quad-core, 64-bit Arm®-based
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processor for embedded networking. The LS1023A (two core version) and the
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@ -36,7 +36,7 @@ UART: supports two UARTs up to 115200 bps for console
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More information are listed in `ls1043`_.
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Boot Sequence
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=============
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-------------
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Bootrom --> TF-A BL1 --> TF-A BL2 --> TF-A BL1 --> TF-A BL31
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@ -44,10 +44,10 @@ Bootrom --> TF-A BL1 --> TF-A BL2 --> TF-A BL1 --> TF-A BL31
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How to build
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============
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------------
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Build Procedure
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---------------
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~~~~~~~~~~~~~~~
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- Prepare AARCH64 toolchain.
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@ -69,7 +69,7 @@ Build Procedure
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BL33=u-boot.bin NEED_BL32=yes BL32=tee.bin SPD=opteed
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Deploy TF-A Images
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-----------------
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~~~~~~~~~~~~~~~~~~
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- Deploy TF-A images on Nor flash Alt Bank.
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@ -1,5 +1,5 @@
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Trusted Firmware-A for Amlogic Meson S905 (GXBB)
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================================================
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Amlogic Meson S905 (GXBB)
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=========================
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The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at
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1.5Ghz. It also contains a Cortex-M3 used as SCP.
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@ -1,5 +1,5 @@
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Trusted Firmware-A for Amlogic Meson S905x (GXL)
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================================================
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Amlogic Meson S905x (GXL)
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=========================
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The Amlogic Meson S905x is a SoC with a quad core Arm Cortex-A53 running at
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1.5Ghz. It also contains a Cortex-M3 used as SCP.
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|
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@ -1,19 +1,19 @@
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Description
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===========
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MediaTek 8183
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=============
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MediaTek 8183 (MT8183) is a 64-bit ARM SoC introduced by MediaTek in early 2018.
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The chip incorporates eight cores - four Cortex-A53 little cores and Cortex-A73.
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Both clusters can operate at up to 2 GHz.
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Boot Sequence
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=============
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-------------
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::
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Boot Rom --> Coreboot --> TF-A BL31 --> Depthcharge --> Linux Kernel
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How to Build
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============
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------------
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.. code:: shell
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@ -1,5 +1,5 @@
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Tegra SoCs - Overview
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=====================
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NVIDIA Tegra
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============
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- .. rubric:: T186
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:name: t186
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@ -58,13 +58,13 @@ to extensive power-gating and dynamic voltage and clock scaling based on
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workloads.
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Directory structure
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===================
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-------------------
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- plat/nvidia/tegra/common - Common code for all Tegra SoCs
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- plat/nvidia/tegra/soc/txxx - Chip specific code
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Trusted OS dispatcher
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=====================
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---------------------
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Tegra supports multiple Trusted OS'.
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@ -83,7 +83,7 @@ Tegra210: TLK and Trusty
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Tegra186: Trusty
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Scatter files
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=============
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-------------
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|
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Tegra platforms currently support scatter files and ld.S scripts. The scatter
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files help support ARMLINK linker to generate BL31 binaries. For now, there
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@ -93,7 +93,7 @@ the scatter file to be used. Tegra platforms have verified BL31 image generation
|
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with ARMCLANG (compilation) and ARMLINK (linking) for the Tegra186 platforms.
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|
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Preparing the BL31 image to run on Tegra SoCs
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=============================================
|
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---------------------------------------------
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.. code:: shell
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|
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@ -125,7 +125,7 @@ uint64\_t boot\_profiler\_shmem\_base;
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} plat\_params\_from\_bl2\_t;
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Power Management
|
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================
|
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----------------
|
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|
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The PSCI implementation expects each platform to expose the 'power state'
|
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parameter to be used during the 'SYSTEM SUSPEND' call. The state-id field
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@ -133,7 +133,7 @@ is implementation defined on Tegra SoCs and is preferably defined by
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tegra\_def.h.
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Tegra configs
|
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=============
|
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-------------
|
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|
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- 'tegra\_enable\_l2\_ecc\_parity\_prot': This flag enables the L2 ECC and Parity
|
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Protection bit, for Arm Cortex-A57 CPUs, during CPU boot. This flag will
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|
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@ -1,5 +1,5 @@
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Trusted Firmware-A for QEMU virt Armv8-A
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========================================
|
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QEMU virt Armv8-A
|
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=================
|
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|
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Trusted Firmware-A (TF-A) implements the EL3 firmware layer for QEMU virt
|
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Armv8-A. BL1 is used as the BootROM, supplied with the -bios argument.
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|
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@ -35,7 +35,7 @@ To build:
|
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::
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make CROSS_COMPILE=aarch64-none-elf- PLAT=qemu
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make CROSS_COMPILE=aarch64-none-elf- PLAT=qemu
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To start (QEMU v2.6.0):
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|
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|
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@ -1,5 +1,5 @@
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Description
|
||||
===========
|
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Renesas R-Car
|
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=============
|
||||
|
||||
"R-Car" is the nickname for Renesas' system-on-chip (SoC) family for
|
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car information systems designed for the next-generation of automotive
|
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|
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@ -97,14 +97,14 @@ program counters.
|
|||
|
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|
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How to build
|
||||
============
|
||||
------------
|
||||
|
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The TF-A build options depend on the target board so you will have to
|
||||
refer to those specific instructions. What follows is customized to
|
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the H3 SiP Salvator-X development system used in this port.
|
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|
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Build Tested:
|
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-------------
|
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~~~~~~~~~~~~~
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RCAR_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1"
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MBEDTLS_DIR=$mbedtls_src
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|
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|
|
@ -112,7 +112,7 @@ $ MBEDTLS_DIR=$mbedtls_src_tree make clean bl2 bl31 rcar_layout_tool \
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PLAT=rcar ${RCAR_OPT} SPD=opteed
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System Tested:
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--------------------
|
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~~~~~~~~~~~~~~
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* mbed_tls:
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git@github.com:ARMmbed/mbedtls.git [devel]
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|
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@ -150,7 +150,7 @@ System Tested:
|
|||
Linux 4.19-rc4
|
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|
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TF-A Build Procedure
|
||||
--------------------
|
||||
~~~~~~~~~~~~~~~~~~~~
|
||||
|
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- Fetch all the above 4 repositories.
|
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|
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|
|
@ -184,7 +184,7 @@ TF-A Build Procedure
|
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make -j8 PLATFORM="rcar" CFG_ARM64_core=y
|
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|
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Install Procedure
|
||||
-----------------
|
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~~~~~~~~~~~~~~~~~
|
||||
|
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- Boot the board in Mini-monitor mode and enable access to the
|
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Hyperflash.
|
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|
|
@ -195,7 +195,7 @@ Install Procedure
|
|||
|
||||
|
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Boot trace
|
||||
==========
|
||||
----------
|
||||
|
||||
Notice that BL31 traces are not accessible via the console and that in
|
||||
order to verbose the BL2 output you will have to compile TF-A with
|
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|
|
@ -266,4 +266,3 @@ LOG_LEVEL=50 and DEBUG=1
|
|||
Net: eth0: ethernet@e6800000
|
||||
Hit any key to stop autoboot: 0
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||||
=>
|
||||
|
||||
|
|
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|
|
@ -1,5 +1,5 @@
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Trusted Firmware-A for Rockchip SoCs
|
||||
====================================
|
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Rockchip SoCs
|
||||
=============
|
||||
|
||||
Trusted Firmware-A supports a number of Rockchip ARM SoCs from both
|
||||
AARCH32 and AARCH64 fields.
|
||||
|
|
@ -12,7 +12,7 @@ This includes right now:
|
|||
|
||||
|
||||
Boot Sequence
|
||||
=============
|
||||
-------------
|
||||
|
||||
For AARCH32:
|
||||
Bootrom --> BL1/BL2 --> BL32 --> BL33 --> Linux kernel
|
||||
|
|
@ -26,7 +26,7 @@ BL1/2 and BL33 can currently be supplied from either:
|
|||
|
||||
|
||||
How to build
|
||||
============
|
||||
------------
|
||||
|
||||
Rockchip SoCs expect TF-A's BL31 (AARCH64) or BL32 (AARCH32) to get
|
||||
integrated with other boot software like U-Boot or Coreboot, so only
|
||||
|
|
@ -46,7 +46,7 @@ compilation toolchain.
|
|||
|
||||
|
||||
How to deploy
|
||||
=============
|
||||
-------------
|
||||
|
||||
Both upstream U-Boot and Coreboot projects contain instructions on where
|
||||
to put the built images during their respective build process.
|
||||
|
|
|
|||
|
|
@ -1,7 +1,5 @@
|
|||
Trusted Firmware-A for Raspberry Pi 3
|
||||
=====================================
|
||||
|
||||
|
||||
Raspberry Pi 3
|
||||
==============
|
||||
|
||||
.. contents::
|
||||
|
||||
|
|
@ -167,7 +165,7 @@ Secondary cores
|
|||
~~~~~~~~~~~~~~~
|
||||
|
||||
This port of the Trusted Firmware-A supports ``PSCI_CPU_ON``,
|
||||
`PSCI_SYSTEM_RESET`` and ``PSCI_SYSTEM_OFF``. The last one doesn't really turn
|
||||
``PSCI_SYSTEM_RESET`` and ``PSCI_SYSTEM_OFF``. The last one doesn't really turn
|
||||
the system off, it simply reboots it and asks the VideoCore firmware to keep it
|
||||
in a low power mode permanently.
|
||||
|
||||
|
|
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|||
|
|
@ -1,6 +1,5 @@
|
|||
Trusted Firmware-A for Socionext UniPhier SoCs
|
||||
==============================================
|
||||
|
||||
Socionext UniPhier
|
||||
==================
|
||||
|
||||
Socionext UniPhier Armv8-A SoCs use Trusted Firmware-A (TF-A) as the secure
|
||||
world firmware, supporting BL2 and BL31.
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
Trusted Firmware-A for STM32MP1
|
||||
===============================
|
||||
STMicroelectronics STM32MP1
|
||||
===========================
|
||||
|
||||
STM32MP1 is a microprocessor designed by STMicroelectronics
|
||||
based on a dual Arm Cortex-A7.
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
Trusted Firmware-A for Socionext Synquacer SoCs
|
||||
===============================================
|
||||
Socionext Synquacer
|
||||
===================
|
||||
|
||||
Socionext's Synquacer SC2A11 is a multi-core processor with 24 cores of Arm
|
||||
Cortex-A53. The Developerbox, of 96boards, is a platform that contains this
|
||||
|
|
@ -9,10 +9,10 @@ the moment.
|
|||
More information are listed in `link`_.
|
||||
|
||||
How to build
|
||||
============
|
||||
------------
|
||||
|
||||
Code Locations
|
||||
--------------
|
||||
~~~~~~~~~~~~~~
|
||||
|
||||
- Trusted Firmware-A:
|
||||
`link <https://github.com/ARM-software/arm-trusted-firmware>`__
|
||||
|
|
@ -27,12 +27,12 @@ Code Locations
|
|||
`link <https://github.com/tianocore/edk2-non-osi>`__
|
||||
|
||||
Boot Flow
|
||||
---------
|
||||
~~~~~~~~~
|
||||
|
||||
SCP firmware --> TF-A BL31 --> UEFI(edk2)
|
||||
|
||||
Build Procedure
|
||||
---------------
|
||||
~~~~~~~~~~~~~~~
|
||||
|
||||
- Firstly, in addition to the “normal” build tools you will also need a
|
||||
few specialist tools. On a Debian or Ubuntu operating system try:
|
||||
|
|
@ -98,7 +98,7 @@ Build Procedure
|
|||
Note #2: Replace -b RELEASE with -b DEBUG to build a debug.
|
||||
|
||||
Install the System Firmware
|
||||
---------------------------
|
||||
~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
||||
- Providing your Developerbox is fully working and has on operating system
|
||||
installed then you can adopt your the newly compiled system firmware using
|
||||
|
|
|
|||
|
|
@ -1,15 +1,17 @@
|
|||
Trusted Firmware-A for Texas Instruments K3 SoCs
|
||||
================================================
|
||||
Texas Instruments K3
|
||||
====================
|
||||
|
||||
Trusted Firmware-A (TF-A) implements the EL3 firmware layer for Texas Instruments K3 SoCs.
|
||||
|
||||
Boot Flow
|
||||
---------
|
||||
|
||||
R5(U-Boot) --> TF-A BL31 --> BL32(OP-TEE) --> TF-A BL31 --> BL33(U-Boot) --> Linux
|
||||
::
|
||||
|
||||
R5(U-Boot) --> TF-A BL31 --> BL32(OP-TEE) --> TF-A BL31 --> BL33(U-Boot) --> Linux
|
||||
\
|
||||
Optional direct to Linux boot
|
||||
\
|
||||
Optional direct to Linux boot
|
||||
\
|
||||
--> BL33(Linux)
|
||||
|
||||
Texas Instruments K3 SoCs contain an R5 processor used as the boot master, it
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
Trusted Firmware-A for i.MX7 WaRP7
|
||||
==================================
|
||||
NXP i.MX7 WaRP7
|
||||
===============
|
||||
|
||||
The Trusted Firmware-A port for the i.MX7Solo WaRP7 implements BL2 at EL3.
|
||||
The i.MX7S contains a BootROM with a High Assurance Boot (HAB) functionality.
|
||||
|
|
@ -7,21 +7,23 @@ This functionality provides a mechanism for establishing a root-of-trust from
|
|||
the reset vector to the command-line in user-space.
|
||||
|
||||
Boot Flow
|
||||
=========
|
||||
---------
|
||||
|
||||
BootROM --> TF-A BL2 --> BL32(OP-TEE) --> BL33(U-Boot) --> Linux
|
||||
|
||||
In the WaRP7 port we encapsulate OP-TEE, DTB and U-Boot into a FIP. This FIP is
|
||||
expected and required
|
||||
|
||||
# Build Instructions
|
||||
Build Instructions
|
||||
------------------
|
||||
|
||||
We need to use a file generated by u-boot in order to generate a .imx image the
|
||||
BootROM will boot. It is therefore _required_ to build u-boot before TF-A and
|
||||
furthermore it is _recommended_ to use the mkimage in the u-boot/tools directory
|
||||
to generate the TF-A .imx image.
|
||||
|
||||
## U-Boot:
|
||||
U-Boot
|
||||
~~~~~~
|
||||
|
||||
https://git.linaro.org/landing-teams/working/mbl/u-boot.git
|
||||
|
||||
|
|
@ -31,7 +33,8 @@ https://git.linaro.org/landing-teams/working/mbl/u-boot.git
|
|||
make warp7_bl33_defconfig;
|
||||
make u-boot.imx arch=ARM CROSS_COMPILE=arm-linux-gnueabihf-
|
||||
|
||||
## OP-TEE:
|
||||
OP-TEE
|
||||
~~~~~~
|
||||
|
||||
https://github.com/OP-TEE/optee_os.git
|
||||
|
||||
|
|
@ -39,7 +42,8 @@ https://github.com/OP-TEE/optee_os.git
|
|||
|
||||
make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- PLATFORM=imx PLATFORM_FLAVOR=mx7swarp7 ARCH=arm CFG_PAGEABLE_ADDR=0 CFG_DT_ADDR=0x83000000 CFG_NS_ENTRY_ADDR=0x87800000
|
||||
|
||||
## TF-A:
|
||||
TF-A
|
||||
~~~~
|
||||
|
||||
https://github.com/ARM-software/arm-trusted-firmware.git
|
||||
|
||||
|
|
@ -75,7 +79,8 @@ It is also assumed copy of mbedtls is available on the path path ../mbedtls
|
|||
|
||||
/path/to/u-boot/tools/mkimage -n /path/to/u-boot/u-boot.cfgout -T imximage -e 0x9df00000 -d ./build/warp7/debug/bl2.bin ./build/warp7/debug/bl2.bin.imx
|
||||
|
||||
## FIP:
|
||||
FIP
|
||||
~~~
|
||||
|
||||
.. code:: shell
|
||||
|
||||
|
|
@ -110,8 +115,8 @@ It is also assumed copy of mbedtls is available on the path path ../mbedtls
|
|||
--trusted-key-cert fiptool_images/trusted-key-cert.key-crt \
|
||||
--tb-fw-cert fiptool_images/trusted-boot-fw.key-crt warp7.fip
|
||||
|
||||
# Deploy Images
|
||||
|
||||
Deploy Images
|
||||
-------------
|
||||
|
||||
First place the WaRP7 into UMS mode in u-boot this should produce an entry in
|
||||
/dev like /dev/disk/by-id/usb-Linux_UMS_disk_0_WaRP7-0xf42400d3000001d4-0\:0
|
||||
|
|
@ -138,7 +143,8 @@ Remember to umount the USB device pefore proceeding
|
|||
sudo umount /dev/disk/by-id/usb-Linux_UMS_disk_0_WaRP7-0xf42400d3000001d4-0\:0*
|
||||
|
||||
|
||||
# Signing BL2
|
||||
Signing BL2
|
||||
-----------
|
||||
|
||||
A further step is to sign BL2.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
Trusted Firmware-A for Xilinx Versal
|
||||
================================
|
||||
Xilinx Versal
|
||||
=============
|
||||
|
||||
Trusted Firmware-A implements the EL3 firmware layer for Xilinx Versal.
|
||||
The platform only uses the runtime part of TF-A as Xilinx Versal already has a
|
||||
|
|
@ -19,7 +19,9 @@ To build ATF for different platform (for now its just versal virtual "versal_vir
|
|||
make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal VERSAL_PLATFORM=versal_virt bl31
|
||||
```
|
||||
|
||||
# Xilinx Versal platform specific build options
|
||||
Xilinx Versal platform specific build options
|
||||
---------------------------------------------
|
||||
|
||||
* `VERSAL_ATF_MEM_BASE`: Specifies the base address of the bl31 binary.
|
||||
* `VERSAL_ATF_MEM_SIZE`: Specifies the size of the memory region of the bl31 binary.
|
||||
* `VERSAL_BL32_MEM_BASE`: Specifies the base address of the bl32 binary.
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
Trusted Firmware-A for Xilinx Zynq UltraScale+ MPSoC
|
||||
====================================================
|
||||
Xilinx Zynq UltraScale+ MPSoC
|
||||
=============================
|
||||
|
||||
Trusted Firmware-A (TF-A) implements the EL3 firmware layer for Xilinx Zynq
|
||||
UltraScale + MPSoC.
|
||||
|
|
@ -23,7 +23,7 @@ To build bl32 TSP you have to rebuild bl31 too:
|
|||
make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp SPD=tspd bl31 bl32
|
||||
|
||||
ZynqMP platform specific build options
|
||||
======================================
|
||||
--------------------------------------
|
||||
|
||||
- ``ZYNQMP_ATF_MEM_BASE``: Specifies the base address of the bl31 binary.
|
||||
- ``ZYNQMP_ATF_MEM_SIZE``: Specifies the size of the memory region of the bl31 binary.
|
||||
|
|
@ -36,7 +36,7 @@ ZynqMP platform specific build options
|
|||
- ``cadence1`` : Cadence UART 1
|
||||
|
||||
FSBL->TF-A Parameter Passing
|
||||
===========================
|
||||
----------------------------
|
||||
|
||||
The FSBL populates a data structure with image information for TF-A. TF-A uses
|
||||
that data to hand off to the loaded images. The address of the handoff data
|
||||
|
|
@ -45,7 +45,7 @@ register is free to be used by other software once TF-A has brought up
|
|||
further firmware images.
|
||||
|
||||
Power Domain Tree
|
||||
=================
|
||||
-----------------
|
||||
|
||||
The following power domain tree represents the power domain model used by TF-A
|
||||
for ZynqMP:
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue