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refactor(cm): introduce a real manage_extensions_nonsecure()
manage_extensions_nonsecure() is problematic because it updates both context and in-place registers (unlike its secure/realm counterparts). The in-place register updates make it particularly tricky, as those never change for the lifetime of TF-A. However, they are only set when exiting to NS world. As such, all of TF-A's execution before that operates under a different context. This is inconsistent and could cause problems. This patch Introduce a real manage_extensions_nonsecure() which only operates on the context structure. It also introduces a cm_manage_extensions_el3() which only operates on register in-place that are not context switched. It is called in BL31's entrypoints so that all of TF-A executes with the same environment once all features have been converted. Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Ic579f86c41026d2054863ef44893e0ba4c591da9
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parent
098312edf7
commit
24a70738b2
4 changed files with 51 additions and 4 deletions
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@ -112,6 +112,9 @@ void bl31_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
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******************************************************************************/
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void bl31_main(void)
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{
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/* Init registers that never change for the lifetime of TF-A */
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cm_manage_extensions_el3();
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NOTICE("BL31: %s\n", version_string);
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NOTICE("BL31: %s\n", build_message);
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@ -37,6 +37,9 @@ void cm_prepare_el3_exit(uint32_t security_state);
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void cm_prepare_el3_exit_ns(void);
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#ifdef __aarch64__
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#if IMAGE_BL31
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void cm_manage_extensions_el3(void);
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#endif
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#if CTX_INCLUDE_EL2_REGS
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void cm_el2_sysregs_context_save(uint32_t security_state);
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void cm_el2_sysregs_context_restore(uint32_t security_state);
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@ -84,6 +87,7 @@ static inline void cm_set_next_context(void *context)
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#else
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void *cm_get_next_context(void);
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void cm_set_next_context(void *context);
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static inline void cm_manage_extensions_el3(void) {}
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#endif /* __aarch64__ */
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#endif /* CONTEXT_MGMT_H */
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@ -37,6 +37,7 @@
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CASSERT(((TWED_DELAY & ~SCR_TWEDEL_MASK) == 0U), assert_twed_delay_value_check);
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#endif /* ENABLE_FEAT_TWED */
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static void manage_extensions_nonsecure(cpu_context_t *ctx);
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static void manage_extensions_secure(cpu_context_t *ctx);
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static void setup_el1_context(cpu_context_t *ctx, const struct entry_point_info *ep)
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@ -288,6 +289,8 @@ static void setup_ns_context(cpu_context_t *ctx, const struct entry_point_info *
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HCRX_EL2_INIT_VAL);
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}
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#endif /* CTX_INCLUDE_EL2_REGS */
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manage_extensions_nonsecure(ctx);
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}
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/*******************************************************************************
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@ -504,9 +507,11 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep)
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/*******************************************************************************
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* Enable architecture extensions on first entry to Non-secure world.
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* When EL2 is implemented but unused `el2_unused` is non-zero, otherwise
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* it is zero.
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* it is zero. This function updates some registers in-place and its contents
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* are being prepared to be moved to cm_manage_extensions_el3 and
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* cm_manage_extensions_nonsecure.
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******************************************************************************/
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static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx)
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static void manage_extensions_nonsecure_mixed(bool el2_unused, cpu_context_t *ctx)
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{
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#if IMAGE_BL31
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if (is_feat_spe_supported()) {
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@ -548,6 +553,36 @@ static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx)
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#endif
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}
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/*******************************************************************************
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* Enable architecture extensions for EL3 execution. This function only updates
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* registers in-place which are expected to either never change or be
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* overwritten by el3_exit.
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******************************************************************************/
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#if IMAGE_BL31
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void cm_manage_extensions_el3(void)
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{
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}
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#endif /* IMAGE_BL31 */
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/*******************************************************************************
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* Enable architecture extensions on first entry to Non-secure world.
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******************************************************************************/
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static void manage_extensions_nonsecure(cpu_context_t *ctx)
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{
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#if IMAGE_BL31
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#endif /* IMAGE_BL31 */
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}
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/*******************************************************************************
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* Enable architecture extensions in-place at EL2 on first entry to Non-secure
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* world when EL2 is empty and unused.
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******************************************************************************/
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static void manage_extensions_nonsecure_el2_unused(void)
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{
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#if IMAGE_BL31
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#endif /* IMAGE_BL31 */
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}
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/*******************************************************************************
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* Enable architecture extensions on first entry to Secure world.
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******************************************************************************/
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@ -845,8 +880,10 @@ void cm_prepare_el3_exit(uint32_t security_state)
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*/
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write_cnthp_ctl_el2(CNTHP_CTL_RESET_VAL &
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~(CNTHP_CTL_ENABLE_BIT));
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manage_extensions_nonsecure_el2_unused();
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}
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manage_extensions_nonsecure(el2_unused, ctx);
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manage_extensions_nonsecure_mixed(el2_unused, ctx);
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}
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cm_el1_sysregs_context_restore(security_state);
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@ -1167,7 +1204,7 @@ void cm_prepare_el3_exit_ns(void)
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* direct register updates. Therefore, do this here
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* instead of when setting up context.
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*/
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manage_extensions_nonsecure(0, ctx);
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manage_extensions_nonsecure_mixed(0, ctx);
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/*
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* Set the NS bit to be able to access the ICC_SRE_EL2
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@ -985,6 +985,9 @@ void psci_warmboot_entrypoint(void)
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unsigned int parent_nodes[PLAT_MAX_PWR_LVL] = {0};
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psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} };
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/* Init registers that never change for the lifetime of TF-A */
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cm_manage_extensions_el3();
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/*
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* Verify that we have been explicitly turned ON or resumed from
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* suspend.
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