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https://github.com/ARM-software/arm-trusted-firmware.git
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Merge changes from topic "stm32_io_update" into integration
* changes: refactor(plat/st): add stm32image_io_setup fix(plat/st): panic if boot interface is wrong
This commit is contained in:
commit
23b7ad5cc0
1 changed files with 19 additions and 32 deletions
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@ -321,6 +321,19 @@ static void print_boot_device(boot_api_context_t *boot_context)
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}
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}
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}
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}
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static void stm32image_io_setup(void)
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{
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int io_result __unused;
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io_result = register_io_dev_stm32image(&stm32image_dev_con);
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assert(io_result == 0);
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io_result = io_dev_open(stm32image_dev_con,
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(uintptr_t)&stm32image_dev_info_spec,
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&image_dev_handle);
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assert(io_result == 0);
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}
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#if STM32MP_SDMMC || STM32MP_EMMC
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#if STM32MP_SDMMC || STM32MP_EMMC
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static void boot_mmc(enum mmc_device_type mmc_dev_type,
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static void boot_mmc(enum mmc_device_type mmc_dev_type,
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uint16_t boot_interface_instance)
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uint16_t boot_interface_instance)
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@ -422,14 +435,6 @@ emmc_boot:
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io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_device_spec,
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io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_device_spec,
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&storage_dev_handle);
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&storage_dev_handle);
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assert(io_result == 0);
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assert(io_result == 0);
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io_result = register_io_dev_stm32image(&stm32image_dev_con);
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assert(io_result == 0);
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io_result = io_dev_open(stm32image_dev_con,
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(uintptr_t)&stm32image_dev_info_spec,
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&image_dev_handle);
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assert(io_result == 0);
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}
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}
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#endif /* STM32MP_SDMMC || STM32MP_EMMC */
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#endif /* STM32MP_SDMMC || STM32MP_EMMC */
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@ -475,14 +480,6 @@ static void boot_spi_nor(boot_api_context_t *boot_context)
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part->part_offset = STM32MP_NOR_TEEX_OFFSET;
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part->part_offset = STM32MP_NOR_TEEX_OFFSET;
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part->bkp_offset = 0U;
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part->bkp_offset = 0U;
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#endif
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#endif
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io_result = register_io_dev_stm32image(&stm32image_dev_con);
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assert(io_result == 0);
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io_result = io_dev_open(stm32image_dev_con,
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(uintptr_t)&stm32image_dev_info_spec,
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&image_dev_handle);
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assert(io_result == 0);
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}
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}
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#endif /* STM32MP_SPI_NOR */
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#endif /* STM32MP_SPI_NOR */
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@ -528,14 +525,6 @@ static void boot_fmc2_nand(boot_api_context_t *boot_context)
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part->part_offset = STM32MP_NAND_TEEX_OFFSET;
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part->part_offset = STM32MP_NAND_TEEX_OFFSET;
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part->bkp_offset = nand_dev_spec.erase_size;
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part->bkp_offset = nand_dev_spec.erase_size;
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#endif
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#endif
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io_result = register_io_dev_stm32image(&stm32image_dev_con);
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assert(io_result == 0);
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io_result = io_dev_open(stm32image_dev_con,
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(uintptr_t)&stm32image_dev_info_spec,
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&image_dev_handle);
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assert(io_result == 0);
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}
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}
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#endif /* STM32MP_RAW_NAND */
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#endif /* STM32MP_RAW_NAND */
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@ -582,14 +571,6 @@ static void boot_spi_nand(boot_api_context_t *boot_context)
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part->part_offset = STM32MP_NAND_TEEX_OFFSET;
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part->part_offset = STM32MP_NAND_TEEX_OFFSET;
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part->bkp_offset = spi_nand_dev_spec.erase_size;
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part->bkp_offset = spi_nand_dev_spec.erase_size;
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#endif
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#endif
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io_result = register_io_dev_stm32image(&stm32image_dev_con);
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assert(io_result == 0);
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io_result = io_dev_open(stm32image_dev_con,
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(uintptr_t)&stm32image_dev_info_spec,
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&image_dev_handle);
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assert(io_result == 0);
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}
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}
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#endif /* STM32MP_SPI_NAND */
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#endif /* STM32MP_SPI_NAND */
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@ -621,36 +602,42 @@ void stm32mp_io_setup(void)
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
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dmbsy();
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dmbsy();
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boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance);
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boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance);
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stm32image_io_setup();
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break;
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break;
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#endif
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#endif
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#if STM32MP_EMMC
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#if STM32MP_EMMC
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
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dmbsy();
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dmbsy();
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boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance);
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boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance);
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stm32image_io_setup();
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break;
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break;
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#endif
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#endif
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#if STM32MP_SPI_NOR
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#if STM32MP_SPI_NOR
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
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dmbsy();
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dmbsy();
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boot_spi_nor(boot_context);
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boot_spi_nor(boot_context);
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stm32image_io_setup();
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break;
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break;
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#endif
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#endif
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#if STM32MP_RAW_NAND
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#if STM32MP_RAW_NAND
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
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dmbsy();
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dmbsy();
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boot_fmc2_nand(boot_context);
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boot_fmc2_nand(boot_context);
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stm32image_io_setup();
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break;
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break;
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#endif
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#endif
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#if STM32MP_SPI_NAND
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#if STM32MP_SPI_NAND
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
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case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
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dmbsy();
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dmbsy();
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boot_spi_nand(boot_context);
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boot_spi_nand(boot_context);
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stm32image_io_setup();
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break;
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break;
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#endif
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#endif
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default:
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default:
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ERROR("Boot interface %d not supported\n",
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ERROR("Boot interface %d not supported\n",
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boot_context->boot_interface_selected);
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boot_context->boot_interface_selected);
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panic();
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break;
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break;
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}
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}
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}
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}
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