mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-26 23:04:50 +00:00
errata: workaround for Cortex-A710 erratum 2055002
Cortex-A710 erratum 2055002 is a Cat B erratum that applies to revisions r1p0 & r2p0 and is still open. The workaround is to set CPUACTLR_EL1[46] to force L2 tag ECC inline correction mode. This workaround works on revision r1p0 & r2p0. SDEN can be found here: https://developer.arm.com/documentation/SDEN1775101/latest Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I67be1dce53c4651167d8cee33c116e73b9dafe81
This commit is contained in:
parent
4618b2bfa7
commit
213afde907
4 changed files with 54 additions and 4 deletions
|
@ -378,6 +378,10 @@ For Cortex-A710, the following errata build flags are defined :
|
||||||
Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
|
Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
|
||||||
r2p0 of the CPU. It is still open.
|
r2p0 of the CPU. It is still open.
|
||||||
|
|
||||||
|
- ``ERRATA_A710_2055002``: This applies errata 2055002 workaround to
|
||||||
|
Cortex-A710 CPU. This needs to be enabled for revisions r1p0, r2p0 of the CPU
|
||||||
|
and is still open.
|
||||||
|
|
||||||
For Neoverse N2, the following errata build flags are defined :
|
For Neoverse N2, the following errata build flags are defined :
|
||||||
|
|
||||||
- ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2
|
- ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2
|
||||||
|
|
|
@ -20,4 +20,10 @@
|
||||||
#define CORTEX_A710_CPUPWRCTLR_EL1 S3_0_C15_C2_7
|
#define CORTEX_A710_CPUPWRCTLR_EL1 S3_0_C15_C2_7
|
||||||
#define CORTEX_A710_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
|
#define CORTEX_A710_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1)
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* CPU Auxiliary Control register specific definitions.
|
||||||
|
******************************************************************************/
|
||||||
|
#define CORTEX_A710_CPUACTLR_EL1 S3_0_C15_C1_0
|
||||||
|
#define CORTEX_A710_CPUACTLR_EL1_BIT_46 (ULL(1) << 46)
|
||||||
|
|
||||||
#endif /* CORTEX_A710_H */
|
#endif /* CORTEX_A710_H */
|
||||||
|
|
|
@ -107,6 +107,32 @@ func check_errata_2081180
|
||||||
b cpu_rev_var_ls
|
b cpu_rev_var_ls
|
||||||
endfunc check_errata_2081180
|
endfunc check_errata_2081180
|
||||||
|
|
||||||
|
/* ---------------------------------------------------------------------
|
||||||
|
* Errata Workaround for Cortex-A710 Erratum 2055002.
|
||||||
|
* This applies to revision r1p0, r2p0 of Cortex-A710 and is still open.
|
||||||
|
* Inputs:
|
||||||
|
* x0: variant[4:7] and revision[0:3] of current cpu.
|
||||||
|
* Shall clobber: x0-x17
|
||||||
|
* ---------------------------------------------------------------------
|
||||||
|
*/
|
||||||
|
func errata_a710_2055002_wa
|
||||||
|
/* Compare x0 against revision r2p0 */
|
||||||
|
mov x17, x30
|
||||||
|
bl check_errata_2055002
|
||||||
|
cbz x0, 1f
|
||||||
|
mrs x1, CORTEX_A710_CPUACTLR_EL1
|
||||||
|
orr x1, x1, CORTEX_A710_CPUACTLR_EL1_BIT_46
|
||||||
|
msr CORTEX_A710_CPUACTLR_EL1, x1
|
||||||
|
1:
|
||||||
|
ret x17
|
||||||
|
endfunc errata_a710_2055002_wa
|
||||||
|
|
||||||
|
func check_errata_2055002
|
||||||
|
/* Applies to r1p0, r2p0 */
|
||||||
|
mov x1, #0x20
|
||||||
|
b cpu_rev_var_ls
|
||||||
|
endfunc check_errata_2055002
|
||||||
|
|
||||||
/* ----------------------------------------------------
|
/* ----------------------------------------------------
|
||||||
* HW will do the cache maintenance while powering down
|
* HW will do the cache maintenance while powering down
|
||||||
* ----------------------------------------------------
|
* ----------------------------------------------------
|
||||||
|
@ -123,10 +149,10 @@ func cortex_a710_core_pwr_dwn
|
||||||
ret
|
ret
|
||||||
endfunc cortex_a710_core_pwr_dwn
|
endfunc cortex_a710_core_pwr_dwn
|
||||||
|
|
||||||
/*
|
|
||||||
* Errata printing function for Cortex A710. Must follow AAPCS.
|
|
||||||
*/
|
|
||||||
#if REPORT_ERRATA
|
#if REPORT_ERRATA
|
||||||
|
/*
|
||||||
|
* Errata printing function for Cortex-A710. Must follow AAPCS.
|
||||||
|
*/
|
||||||
func cortex_a710_errata_report
|
func cortex_a710_errata_report
|
||||||
stp x8, x30, [sp, #-16]!
|
stp x8, x30, [sp, #-16]!
|
||||||
|
|
||||||
|
@ -139,6 +165,7 @@ func cortex_a710_errata_report
|
||||||
*/
|
*/
|
||||||
report_errata ERRATA_A710_1987031, cortex_a710, 1987031
|
report_errata ERRATA_A710_1987031, cortex_a710, 1987031
|
||||||
report_errata ERRATA_A710_2081180, cortex_a710, 2081180
|
report_errata ERRATA_A710_2081180, cortex_a710, 2081180
|
||||||
|
report_errata ERRATA_A710_2055002, cortex_a710, 2055002
|
||||||
|
|
||||||
ldp x8, x30, [sp], #16
|
ldp x8, x30, [sp], #16
|
||||||
ret
|
ret
|
||||||
|
@ -164,6 +191,11 @@ func cortex_a710_reset_func
|
||||||
bl errata_a710_2081180_wa
|
bl errata_a710_2081180_wa
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if ERRATA_A710_2055002
|
||||||
|
mov x0, x18
|
||||||
|
bl errata_a710_2055002_wa
|
||||||
|
#endif
|
||||||
|
|
||||||
isb
|
isb
|
||||||
ret x19
|
ret x19
|
||||||
endfunc cortex_a710_reset_func
|
endfunc cortex_a710_reset_func
|
||||||
|
|
|
@ -429,6 +429,10 @@ ERRATA_N2_2067956 ?=0
|
||||||
# to revision r0p0 of the Neoverse N2 cpu and is still open.
|
# to revision r0p0 of the Neoverse N2 cpu and is still open.
|
||||||
ERRATA_N2_2025414 ?=0
|
ERRATA_N2_2025414 ?=0
|
||||||
|
|
||||||
|
# Flag to apply erratum 2055002 workaround during reset. This erratum applies
|
||||||
|
# to revision r1p0, r2p0 of the Cortex-A710 cpu and is still open.
|
||||||
|
ERRATA_A710_2055002 ?=0
|
||||||
|
|
||||||
# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
|
# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
|
||||||
# Applying the workaround results in higher DSU power consumption on idle.
|
# Applying the workaround results in higher DSU power consumption on idle.
|
||||||
ERRATA_DSU_798953 ?=0
|
ERRATA_DSU_798953 ?=0
|
||||||
|
@ -790,6 +794,10 @@ $(eval $(call add_define,ERRATA_N2_2067956))
|
||||||
$(eval $(call assert_boolean,ERRATA_N2_2025414))
|
$(eval $(call assert_boolean,ERRATA_N2_2025414))
|
||||||
$(eval $(call add_define,ERRATA_N2_2025414))
|
$(eval $(call add_define,ERRATA_N2_2025414))
|
||||||
|
|
||||||
|
# Process ERRATA_A710_2055002 flag
|
||||||
|
$(eval $(call assert_boolean,ERRATA_A710_2055002))
|
||||||
|
$(eval $(call add_define,ERRATA_A710_2055002))
|
||||||
|
|
||||||
# Process ERRATA_DSU_798953 flag
|
# Process ERRATA_DSU_798953 flag
|
||||||
$(eval $(call assert_boolean,ERRATA_DSU_798953))
|
$(eval $(call assert_boolean,ERRATA_DSU_798953))
|
||||||
$(eval $(call add_define,ERRATA_DSU_798953))
|
$(eval $(call add_define,ERRATA_DSU_798953))
|
||||||
|
|
Loading…
Add table
Reference in a new issue