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SPMC: manifest changes to support multicore boot
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icf90c2ccce75257908ba3d4703926041d64b1dd3
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a92bc73b8e
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2111b0024c
2 changed files with 19 additions and 17 deletions
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@ -44,7 +44,7 @@ typedef struct spm_core_manifest_sect_attribute {
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uint32_t binary_size;
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uint32_t binary_size;
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/*
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/*
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* ID of the SPMD (mandatory)
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* ID of the SPMC (mandatory)
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*/
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*/
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uint16_t spmc_id;
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uint16_t spmc_id;
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@ -5,6 +5,14 @@
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*/
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*/
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/dts-v1/;
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/dts-v1/;
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#define AFF 00
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#include "fvp-defs.dtsi"
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#undef POST
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#define POST \
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enable-method = "psci"; \
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};
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/ {
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/ {
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compatible = "arm,ffa-core-manifest-1.0";
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compatible = "arm,ffa-core-manifest-1.0";
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#address-cells = <2>;
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#address-cells = <2>;
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@ -17,6 +25,7 @@
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exec_state = <0x0>;
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exec_state = <0x0>;
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load_address = <0x0 0x6000000>;
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load_address = <0x0 0x6000000>;
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entrypoint = <0x0 0x6000000>;
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entrypoint = <0x0 0x6000000>;
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binary_size = <0x80000>;
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};
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};
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chosen {
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chosen {
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@ -51,22 +60,15 @@
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#address-cells = <0x2>;
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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#size-cells = <0x0>;
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cpu-map {
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CPU_0
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cluster0 {
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/* SPM(Hafnium) requires secondary cpu nodes are declared in descending order */
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core0 {
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CPU_7
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cpu = <0x2>;
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CPU_6
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};
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CPU_5
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};
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CPU_4
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};
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CPU_3
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CPU_2
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cpu@0 {
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CPU_1
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <0xc>;
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phandle = <0x2>;
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};
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};
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};
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memory@60000000 {
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memory@60000000 {
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