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fix(security): workaround for CVE-2022-23960

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Implements the loop workaround for Cortex-A77, Cortex-A78,
Cortex-A710, Cortex-X2, Neoverse N1, Neoverse N2 and Neoverse V1
CPUs.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I11d342df7a2068a15e18f4974c645af3b341235b
This commit is contained in:
Bipin Ravi 2022-01-18 01:59:06 -06:00
parent fee7b2d3b4
commit 1fe4a9d181
18 changed files with 378 additions and 38 deletions
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5
docs/design/cpu-specific-build-macros.rst
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@ -29,6 +29,10 @@ vulnerability workarounds should be applied at runtime.
platform contains at least 1 CPU that requires dynamic mitigation.
Defaults to 0.
- ``WORKAROUND_CVE_2022_23960``: Enables mitigation for `CVE-2022-23960`_.
This build option should be set to 1 if the target platform contains at
least 1 CPU that requires this mitigation. Defaults to 1.
.. _arm_cpu_macros_errata_workarounds:
CPU Errata Workarounds
@ -585,6 +589,7 @@ architecture that can be enabled by the platform as desired.
.. _CVE-2017-5715: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2017-5715
.. _CVE-2018-3639: http://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-3639
.. _CVE-2022-23960: https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2022-23960
.. _Cortex-A53 MPCore Software Developers Errata Notice: http://infocenter.arm.com/help/topic/com.arm.doc.epm048406/index.html
.. _Cortex-A57 MPCore Software Developers Errata Notice: http://infocenter.arm.com/help/topic/com.arm.doc.epm049219/index.html
.. _Cortex-A72 MPCore Software Developers Errata Notice: http://infocenter.arm.com/help/topic/com.arm.doc.epm012079/index.html