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https://github.com/ARM-software/arm-trusted-firmware.git
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Add librom support in FVP
Change-Id: Idb9ba3864d6de3053260724f07172fd32c1523e0 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
This commit is contained in:
parent
5accce5bcc
commit
1eb735d753
9 changed files with 91 additions and 5 deletions
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@ -71,9 +71,12 @@
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#elif defined(IMAGE_BL32)
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# define PLAT_ARM_MMAP_ENTRIES 8
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# define MAX_XLAT_TABLES 5
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#else
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#elif !USE_ROMLIB
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# define PLAT_ARM_MMAP_ENTRIES 11
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# define MAX_XLAT_TABLES 5
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#else
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# define PLAT_ARM_MMAP_ENTRIES 12
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# define MAX_XLAT_TABLES 6
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#endif
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/*
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@ -82,6 +85,18 @@
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*/
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#define PLAT_ARM_MAX_BL1_RW_SIZE 0xB000
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/*
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* PLAT_ARM_MAX_ROMLIB_RW_SIZE is define to use a full page
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*/
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#if USE_ROMLIB
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#define PLAT_ARM_MAX_ROMLIB_RW_SIZE 0x1000
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#define PLAT_ARM_MAX_ROMLIB_RO_SIZE 0xe000
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#else
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#define PLAT_ARM_MAX_ROMLIB_RW_SIZE 0
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#define PLAT_ARM_MAX_ROMLIB_RO_SIZE 0
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#endif
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/*
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* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a
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* little space for growth.
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@ -268,6 +268,17 @@
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- BL_COHERENT_RAM_BASE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#endif
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#if USE_ROMLIB
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#define ARM_MAP_ROMLIB_CODE MAP_REGION_FLAT( \
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ROMLIB_RO_BASE, \
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ROMLIB_RO_LIMIT - ROMLIB_RO_BASE,\
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MT_CODE | MT_SECURE)
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#define ARM_MAP_ROMLIB_DATA MAP_REGION_FLAT( \
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ROMLIB_RW_BASE, \
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ROMLIB_RW_END - ROMLIB_RW_BASE,\
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MT_MEMORY | MT_RW | MT_SECURE)
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#endif
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/*
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* The max number of regions like RO(code), coherent and data required by
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@ -346,14 +357,23 @@
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******************************************************************************/
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#define BL1_RO_BASE PLAT_ARM_TRUSTED_ROM_BASE
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#define BL1_RO_LIMIT (PLAT_ARM_TRUSTED_ROM_BASE \
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+ PLAT_ARM_TRUSTED_ROM_SIZE)
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+ (PLAT_ARM_TRUSTED_ROM_SIZE - \
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PLAT_ARM_MAX_ROMLIB_RO_SIZE))
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/*
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* Put BL1 RW at the top of the Trusted SRAM.
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*/
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#define BL1_RW_BASE (ARM_BL_RAM_BASE + \
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ARM_BL_RAM_SIZE - \
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PLAT_ARM_MAX_BL1_RW_SIZE)
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#define BL1_RW_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
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(PLAT_ARM_MAX_BL1_RW_SIZE +\
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PLAT_ARM_MAX_ROMLIB_RW_SIZE))
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#define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \
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(ARM_BL_RAM_SIZE - PLAT_ARM_MAX_ROMLIB_RW_SIZE))
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#define ROMLIB_RO_BASE BL1_RO_LIMIT
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#define ROMLIB_RO_LIMIT (PLAT_ARM_TRUSTED_ROM_BASE + PLAT_ARM_TRUSTED_ROM_SIZE)
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#define ROMLIB_RW_BASE (BL1_RW_BASE + PLAT_ARM_MAX_BL1_RW_SIZE)
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#define ROMLIB_RW_END (ROMLIB_RW_BASE + PLAT_ARM_MAX_ROMLIB_RW_SIZE)
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/*******************************************************************************
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* BL2 specific defines.
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@ -72,6 +72,8 @@ typedef struct arm_tzc_regions_info {
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void arm_setup_page_tables(const mmap_region_t bl_regions[],
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const mmap_region_t plat_regions[]);
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void arm_setup_romlib(void);
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#if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
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/*
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* Use this macro to instantiate lock before it is used in below
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@ -67,6 +67,8 @@
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* in debug mode. We can test TBB on Juno bypassing the ROM and using 128 KB of
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* flash
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*/
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#define PLAT_ARM_MAX_ROMLIB_RO_SIZE 0
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#if TRUSTED_BOARD_BOOT
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#define PLAT_ARM_TRUSTED_ROM_SIZE 0x00020000
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#else
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@ -122,6 +124,15 @@
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# define PLAT_ARM_MAX_BL1_RW_SIZE 0x6000
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#endif
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/*
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* PLAT_ARM_MAX_ROMLIB_RW_SIZE is define to use a full page
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*/
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#if USE_ROMLIB
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#define PLAT_ARM_MAX_ROMLIB_RW_SIZE 0x1000
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#else
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#define PLAT_ARM_MAX_ROMLIB_RW_SIZE 0
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#endif
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/*
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* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a
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* little space for growth.
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@ -117,6 +117,10 @@ void arm_bl1_plat_arch_setup(void)
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const mmap_region_t bl_regions[] = {
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MAP_BL1_TOTAL,
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MAP_BL1_RO,
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#if USE_ROMLIB
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ARM_MAP_ROMLIB_CODE,
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ARM_MAP_ROMLIB_DATA,
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#endif
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{0}
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};
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@ -126,6 +130,8 @@ void arm_bl1_plat_arch_setup(void)
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#else
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enable_mmu_el3(0);
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#endif /* AARCH32 */
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arm_setup_romlib();
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}
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void bl1_plat_arch_setup(void)
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@ -246,6 +246,10 @@ void arm_bl2_plat_arch_setup(void)
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const mmap_region_t bl_regions[] = {
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MAP_BL2_TOTAL,
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ARM_MAP_BL_RO,
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#if USE_ROMLIB
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ARM_MAP_ROMLIB_CODE,
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ARM_MAP_ROMLIB_DATA,
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#endif
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{0}
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};
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@ -256,6 +260,8 @@ void arm_bl2_plat_arch_setup(void)
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#else
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enable_mmu_el1(0);
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#endif
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arm_setup_romlib();
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}
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void bl2_plat_arch_setup(void)
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@ -73,6 +73,10 @@ void arm_bl2u_plat_arch_setup(void)
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const mmap_region_t bl_regions[] = {
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MAP_BL2U_TOTAL,
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ARM_MAP_BL_RO,
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#if USE_ROMLIB
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ARM_MAP_ROMLIB_CODE,
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ARM_MAP_ROMLIB_DATA,
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#endif
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{0}
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};
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@ -83,6 +87,7 @@ void arm_bl2u_plat_arch_setup(void)
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#else
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enable_mmu_el1(0);
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#endif
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arm_setup_romlib();
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}
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void bl2u_plat_arch_setup(void)
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@ -285,9 +285,18 @@ void bl31_plat_runtime_setup(void)
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void arm_bl31_plat_arch_setup(void)
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{
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#define ARM_MAP_BL_ROMLIB MAP_REGION_FLAT( \
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BL31_BASE, \
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BL31_END - BL31_BASE, \
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MT_MEMORY | MT_RW | MT_SECURE)
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const mmap_region_t bl_regions[] = {
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MAP_BL31_TOTAL,
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ARM_MAP_BL_RO,
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#if USE_ROMLIB
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ARM_MAP_ROMLIB_CODE,
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ARM_MAP_ROMLIB_DATA,
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#endif
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#if USE_COHERENT_MEM
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ARM_MAP_BL_COHERENT_RAM,
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#endif
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@ -297,6 +306,8 @@ void arm_bl31_plat_arch_setup(void)
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arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
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enable_mmu_el3(0);
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arm_setup_romlib();
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}
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void bl31_plat_arch_setup(void)
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@ -10,8 +10,9 @@
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#include <debug.h>
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#include <mmio.h>
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#include <plat_arm.h>
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#include <platform_def.h>
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#include <platform.h>
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#include <platform_def.h>
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#include <romlib.h>
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#include <secure_partition.h>
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/* Weak definitions may be overridden in specific ARM standard platform */
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@ -24,6 +25,15 @@
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#pragma weak plat_get_syscnt_freq2
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#endif
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void arm_setup_romlib(void)
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{
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#if USE_ROMLIB
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if (!rom_lib_init(ROMLIB_VERSION))
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panic();
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#endif
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}
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/*
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* Set up the page tables for the generic and platform-specific memory regions.
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* The size of the Trusted SRAM seen by the BL image must be specified as well
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