Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-16 09:34:18 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

refactor(arm): rename L0/L1 GPT base macros

Browse source 
In accordance with common naming conventions, macros specifying the base
address of a region typically use the prefix "BASE" combined with the
region name, rather than "ADDR_BASE."

Currently, the macros defining the base addresses for L0 and L1 GPT
tables within `arm_def.h` are named "ARM_L0_GPT_ADDR_BASE" and
"ARM_L1_GPT_ADDR_BASE" respectively. To adhere to the established naming
convention, rename these macros as "ARM_L1_GPT_BASE" and
"ARM_L0_GPT_BASE" respectively.

Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com>
Change-Id: Ibd50a58a1f63ba97d2df141f41a21a89ef97d6fb
This commit is contained in:
Rohit Mathew 2024-01-18 22:32:52 +00:00
parent 19220a02c7
commit 1e7545accd
3 changed files with 9 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
include/plat/arm/common/arm_def.h
View file

@ -150,10 +150,10 @@ MEASURED_BOOT
#endif /* (SPD_tspd || SPD_opteed || SPD_spmd) && MEASURED_BOOT */
#if ENABLE_RME
#define ARM_L1_GPT_ADDR_BASE (ARM_DRAM1_BASE + \
#define ARM_L1_GPT_BASE (ARM_DRAM1_BASE + \
ARM_DRAM1_SIZE - \
ARM_L1_GPT_SIZE)
#define ARM_L1_GPT_END (ARM_L1_GPT_ADDR_BASE + \
#define ARM_L1_GPT_END (ARM_L1_GPT_BASE + \
ARM_L1_GPT_SIZE - 1U)
#define ARM_REALM_BASE (ARM_EL3_RMM_SHARED_BASE - \
@ -343,7 +343,7 @@ MEASURED_BOOT
#define ARM_MAP_GPT_L1_DRAM MAP_REGION_FLAT( \
ARM_L1_GPT_ADDR_BASE, \
ARM_L1_GPT_BASE, \
ARM_L1_GPT_SIZE, \
MT_MEMORY | MT_RW | EL3_PAS)
@ -422,7 +422,7 @@ MEASURED_BOOT
* Map L0_GPT with read and write permissions
*/
#if ENABLE_RME
#define ARM_MAP_L0_GPT_REGION MAP_REGION_FLAT(ARM_L0_GPT_ADDR_BASE, \
#define ARM_MAP_L0_GPT_REGION MAP_REGION_FLAT(ARM_L0_GPT_BASE, \
ARM_L0_GPT_SIZE, \
MT_MEMORY | MT_RW | MT_ROOT)
#endif
@ -533,8 +533,8 @@ MEASURED_BOOT
* configuration memory, 4KB aligned.
*/
#define ARM_L0_GPT_SIZE (PAGE_SIZE)
#define ARM_L0_GPT_ADDR_BASE (ARM_FW_CONFIGS_LIMIT)
#define ARM_L0_GPT_LIMIT (ARM_L0_GPT_ADDR_BASE + ARM_L0_GPT_SIZE)
#define ARM_L0_GPT_BASE (ARM_FW_CONFIGS_LIMIT)
#define ARM_L0_GPT_LIMIT (ARM_L0_GPT_BASE + ARM_L0_GPT_SIZE)
#else
#define ARM_L0_GPT_SIZE U(0)
#endif

2
include/plat/arm/common/arm_pas_def.h
View file

@ -107,7 +107,7 @@
ARM_EL3_TZC_DRAM1_SIZE, \
GPT_GPI_ROOT)
#define ARM_PAS_GPTS GPT_MAP_REGION_GRANULE(ARM_L1_GPT_ADDR_BASE, \
#define ARM_PAS_GPTS GPT_MAP_REGION_GRANULE(ARM_L1_GPT_BASE, \
ARM_L1_GPT_SIZE, \
GPT_GPI_ROOT)

4
plat/arm/common/arm_bl2_setup.c
View file

@ -151,7 +151,7 @@ static void arm_bl2_plat_gpt_setup(void)
};
/* Initialize entire protected space to GPT_GPI_ANY. */
if (gpt_init_l0_tables(GPCCR_PPS_64GB, ARM_L0_GPT_ADDR_BASE,
if (gpt_init_l0_tables(GPCCR_PPS_64GB, ARM_L0_GPT_BASE,
ARM_L0_GPT_SIZE) < 0) {
ERROR("gpt_init_l0_tables() failed!\n");
panic();
@ -159,7 +159,7 @@ static void arm_bl2_plat_gpt_setup(void)
/* Carve out defined PAS ranges. */
if (gpt_init_pas_l1_tables(GPCCR_PGS_4K,
ARM_L1_GPT_ADDR_BASE,
ARM_L1_GPT_BASE,
ARM_L1_GPT_SIZE,
pas_regions,
(unsigned int)(sizeof(pas_regions) /