Djam/arm-trusted-firmware
1
0
Fork 0
mirror of https://github.com/ARM-software/arm-trusted-firmware.git synced 2025-04-18 18:44:22 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

fix(cpus): workaround for Cortex-X2 erratum 2768515

Browse source 
Cortex-X2 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775100/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ib02688f7b6dc7f6ec305e68e8895174f6fd577a0
This commit is contained in:
Bipin Ravi 2022-12-07 13:54:02 -06:00
parent b87b02cf1d
commit 1cfde82227
3 changed files with 44 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
docs/design/cpu-specific-build-macros.rst
View file

@ -599,6 +599,10 @@ For Cortex-X2, the following errata build flags are defined :
Cortex-X2 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
of the CPU and is fixed in r2p1.
- ``ERRATA_X2_2768515``: This applies errata 2768515 workaround to
Cortex-X2 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0
and r2p1 of the CPU and is still open.
For Cortex-X3, the following errata build flags are defined :
- ``ERRATA_X3_2313909``: This applies errata 2313909 workaround to

31
lib/cpus/aarch64/cortex_x2.S
View file

@ -295,6 +295,30 @@ func check_errata_2371105
b cpu_rev_var_ls
endfunc check_errata_2371105
/* ----------------------------------------------------
* Errata Workaround for Cortex-X2 Errata #2768515
* This applies to revisions <= r2p1 and is still open.
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* ----------------------------------------------------
*/
func errata_x2_2768515_wa
mov x17, x30
bl check_errata_2768515
cbz x0, 1f
/* dsb before isb of power down sequence */
dsb sy
1:
ret x17
endfunc errata_x2_2768515_wa
func check_errata_2768515
/* Applies to all revisions <= r2p1 */
mov x1, #0x21
b cpu_rev_var_ls
endfunc check_errata_2768515
/* ----------------------------------------------------
* HW will do the cache maintenance while powering down
* ----------------------------------------------------
@ -307,6 +331,12 @@ func cortex_x2_core_pwr_dwn
mrs x0, CORTEX_X2_CPUPWRCTLR_EL1
orr x0, x0, #CORTEX_X2_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
msr CORTEX_X2_CPUPWRCTLR_EL1, x0
#if ERRATA_X2_2768515
mov x15, x30
bl cpu_get_rev_var
bl errata_x2_2768515_wa
mov x30, x15
#endif /* ERRATA_X2_2768515 */
isb
ret
endfunc cortex_x2_core_pwr_dwn
@ -333,6 +363,7 @@ func cortex_x2_errata_report
report_errata ERRATA_X2_2147715, cortex_x2, 2147715
report_errata ERRATA_X2_2216384, cortex_x2, 2216384
report_errata ERRATA_X2_2371105, cortex_x2, 2371105
report_errata ERRATA_X2_2768515, cortex_x2, 2768515
report_errata WORKAROUND_CVE_2022_23960, cortex_x2, cve_2022_23960
report_errata ERRATA_DSU_2313941, cortex_x2, dsu_2313941

9
lib/cpus/cpu-ops.mk
View file

@ -660,6 +660,11 @@ ERRATA_X2_2147715 ?=0
# to revision r0p0, r1p0 and r2p0 of the Cortex-X2 cpu and is fixed in r2p1.
ERRATA_X2_2371105 ?=0
# Flag to apply erratum 2768515 workaround during power down. This erratum
# applies to revision r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is
# still open.
ERRATA_X2_2768515 ?=0
# Flag to apply erratum 2313909 workaround on powerdown. This erratum applies
# to revisions r0p0 and r1p0 of the Cortex-X3 cpu, it is fixed in r1p1.
ERRATA_X3_2313909 ?=0
@ -1297,6 +1302,10 @@ $(eval $(call add_define,ERRATA_X2_2147715))
$(eval $(call assert_boolean,ERRATA_X2_2371105))
$(eval $(call add_define,ERRATA_X2_2371105))
# Process ERRATA_X2_2768515 flag
$(eval $(call assert_boolean,ERRATA_X2_2768515))
$(eval $(call add_define,ERRATA_X2_2768515))
# Process ERRATA_X3_2313909 flag
$(eval $(call assert_boolean,ERRATA_X3_2313909))
$(eval $(call add_define,ERRATA_X3_2313909))