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fix(imx8m): fix imx8mq build break
Fix the build break for i.MX8MQ to make it boot with basic function enabled. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I2ff7976e3fb7960d6876d26fe0b4a78e51219ae2
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3a36f70ba0
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1b65be5943
3 changed files with 15 additions and 5 deletions
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@ -209,13 +209,19 @@ void bl31_plat_arch_setup(void)
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MT_MEMORY | MT_RW | MT_SECURE),
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MT_MEMORY | MT_RW | MT_SECURE),
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MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
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MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
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MT_MEMORY | MT_RO | MT_SECURE),
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MT_MEMORY | MT_RO | MT_SECURE),
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#if SEPARATE_NOBITS_REGION
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MAP_REGION_FLAT(BL_NOBITS_BASE, BL_NOBITS_END - BL_NOBITS_BASE,
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MT_RW_DATA | MT_SECURE),
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#endif
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#if USE_COHERENT_MEM
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#if USE_COHERENT_MEM
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MAP_REGION_FLAT(BL_COHERENT_RAM_BASE,
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MAP_REGION_FLAT(BL_COHERENT_RAM_BASE,
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BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
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BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
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MT_DEVICE | MT_RW | MT_SECURE),
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MT_DEVICE | MT_RW | MT_SECURE),
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#endif
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#endif
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#if defined(SPD_opteed) || defined(SPD_trusty)
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/* Map TEE memory */
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/* Map TEE memory */
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MAP_REGION_FLAT(BL32_BASE, BL32_SIZE, MT_MEMORY | MT_RW),
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MAP_REGION_FLAT(BL32_BASE, BL32_SIZE, MT_MEMORY | MT_RW),
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#endif
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{0},
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{0},
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};
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};
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@ -37,6 +37,12 @@
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#define BL31_SIZE SZ_64K
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#define BL31_SIZE SZ_64K
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#define BL31_LIMIT (BL31_BASE + BL31_SIZE)
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#define BL31_LIMIT (BL31_BASE + BL31_SIZE)
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#define OCRAM_S_BASE U(0x180000)
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#define OCRAM_S_SIZE SZ_32K
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#define OCRAM_S_LIMIT (OCRAM_S_BASE + OCRAM_S_SIZE)
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#define BL31_NOBITS_BASE OCRAM_S_BASE
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#define BL31_NOBITS_LIMIT (BL31_NOBITS_BASE + SZ_32K)
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/* non-secure uboot base */
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/* non-secure uboot base */
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#ifndef PLAT_NS_IMAGE_OFFSET
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#ifndef PLAT_NS_IMAGE_OFFSET
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#define PLAT_NS_IMAGE_OFFSET U(0x40200000)
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#define PLAT_NS_IMAGE_OFFSET U(0x40200000)
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@ -54,7 +60,7 @@
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#define MAX_XLAT_TABLES 5
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#define MAX_XLAT_TABLES 5
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#define MAX_MMAP_REGIONS 15
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#define MAX_MMAP_REGIONS 15
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#else
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#else
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#define MAX_XLAT_TABLES 4
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#define MAX_XLAT_TABLES 3
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#define MAX_MMAP_REGIONS 14
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#define MAX_MMAP_REGIONS 14
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#endif
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#endif
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@ -144,10 +150,6 @@
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#define GPR_TZASC_EN BIT(0)
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#define GPR_TZASC_EN BIT(0)
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#define GPR_TZASC_EN_LOCK BIT(16)
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#define GPR_TZASC_EN_LOCK BIT(16)
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#define OCRAM_S_BASE U(0x00180000)
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#define OCRAM_S_SIZE U(0x8000)
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#define OCRAM_S_LIMIT (OCRAM_S_BASE + OCRAM_S_SIZE)
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#define COUNTER_FREQUENCY 8333333 /* 25MHz / 3 */
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#define COUNTER_FREQUENCY 8333333 /* 25MHz / 3 */
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#define IMX_WDOG_B_RESET
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#define IMX_WDOG_B_RESET
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@ -64,6 +64,8 @@ ifeq (${IMX_DRAM_RETENTION},1)
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BL31_SOURCES += ${IMX_DRAM_SOURCES}
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BL31_SOURCES += ${IMX_DRAM_SOURCES}
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endif
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endif
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SEPARATE_NOBITS_REGION := 1
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ifneq (${PRELOADED_BL33_BASE},)
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ifneq (${PRELOADED_BL33_BASE},)
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$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
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$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
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endif
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endif
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