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fix(intel): resolved coverity checking

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Coverity checking fix. Resolved unused value, deadcode and uninit.

	1. CID: 395326
	2. CID: 395327
	3. CID: 395328
	4. CID: 395329
	5. CID: 395330

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I86b8af28dc345542b142ce53e1935bb855888238
This commit is contained in:
Sieu Mun Tang 2023-07-08 02:30:08 +08:00
parent 1eb5e90341
commit 1af7bf71c0
2 changed files with 1 additions and 11 deletions
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2
plat/intel/soc/agilex5/bl2_plat_setup.c
View file

@ -68,7 +68,7 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
{
static console_t console;
handoff reverse_handoff_ptr;
handoff reverse_handoff_ptr = { 0 };
generic_delay_timer_init();
config_clkmgr_handoff(&reverse_handoff_ptr);

10
plat/intel/soc/agilex5/soc/agilex5_clock_manager.c
View file

@ -178,17 +178,7 @@ uint32_t get_clk_freq(uint32_t psrc_reg, uint32_t main_pllc, uint32_t per_pllc)
pllc_reg = CLKMGR_MAINPLL + main_pllc;
pllglob_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB;
break;
case CLKMGR_PSRC_PER:
pllm_reg = CLKMGR_PERPLL + CLKMGR_PERPLL_PLLM;
pllc_reg = CLKMGR_PERPLL + per_pllc;
pllglob_reg = CLKMGR_PERPLL + CLKMGR_PERPLL_PLLGLOB;
break;
default:
return 0;
}
pllm_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLM;
pllc_reg = CLKMGR_MAINPLL + main_pllc;
pllglob_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB;
ref_clk = get_ref_clk(mmio_read_32(pllglob_reg));
mdiv = CLKMGR_PLLM_MDIV(mmio_read_32(pllm_reg));