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feat(st-clock): use early traces

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Replace trace macros with their corresponding EARLY_* macros.

Change-Id: I39b163964fa3129be38e58352b5dee9b4081675b
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
This commit is contained in:
Yann Gautier 2023-11-02 15:33:28 +01:00 • committed by Yann Gautier
parent eca510346d
commit 1a25db196d
2 changed files with 16 additions and 16 deletions
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8
drivers/st/clk/clk-stm32mp13.c
View file

@ -974,8 +974,8 @@ static int stm32mp1_set_hsidiv(uint8_t hsidiv)
timeout = timeout_init_us(HSIDIV_TIMEOUT); timeout = timeout_init_us(HSIDIV_TIMEOUT);
while ((mmio_read_32(address) & RCC_OCRDYR_HSIDIVRDY) == 0U) { while ((mmio_read_32(address) & RCC_OCRDYR_HSIDIVRDY) == 0U) {
if (timeout_elapsed(timeout)) { if (timeout_elapsed(timeout)) {
ERROR("HSIDIV failed @ 0x%lx: 0x%x\n", EARLY_ERROR("HSIDIV failed @ 0x%lx: 0x%x\n",
address, mmio_read_32(address)); address, mmio_read_32(address));
return -ETIMEDOUT; return -ETIMEDOUT;
} }
} }
@ -997,7 +997,7 @@ static int stm32mp1_hsidiv(unsigned long hsifreq)
} }
if (hsidiv == 4U) { if (hsidiv == 4U) {
ERROR("Invalid clk-hsi frequency\n"); EARLY_ERROR("Invalid clk-hsi frequency\n");
return -EINVAL; return -EINVAL;
} }
@ -1239,7 +1239,7 @@ static void clk_stm32_pll_config_vco(struct stm32_clk_priv *priv,
uint32_t value = 0; uint32_t value = 0;
if (clk_stm32_pll_compute_cfgr1(priv, pll, vco, &value) != 0) { if (clk_stm32_pll_compute_cfgr1(priv, pll, vco, &value) != 0) {
ERROR("Invalid Vref clock !\n"); EARLY_ERROR("Invalid Vref clock !\n");
panic(); panic();
} }

24
drivers/st/clk/stm32mp1_clk.c
View file

@ -1617,7 +1617,7 @@ static void stm32mp1_lse_enable(bool bypass, bool digbyp, uint32_t lsedrv)
static void stm32mp1_lse_wait(void) static void stm32mp1_lse_wait(void)
{ {
if (stm32mp1_osc_wait(true, RCC_BDCR, RCC_BDCR_LSERDY) != 0) { if (stm32mp1_osc_wait(true, RCC_BDCR, RCC_BDCR_LSERDY) != 0) {
VERBOSE("%s: failed\n", __func__); EARLY_ERROR("%s: failed\n", __func__);
} }
} }
@ -1626,7 +1626,7 @@ static void stm32mp1_lsi_set(bool enable)
stm32mp1_ls_osc_set(enable, RCC_RDLSICR, RCC_RDLSICR_LSION); stm32mp1_ls_osc_set(enable, RCC_RDLSICR, RCC_RDLSICR_LSION);
if (stm32mp1_osc_wait(enable, RCC_RDLSICR, RCC_RDLSICR_LSIRDY) != 0) { if (stm32mp1_osc_wait(enable, RCC_RDLSICR, RCC_RDLSICR_LSIRDY) != 0) {
VERBOSE("%s: failed\n", __func__); EARLY_ERROR("%s: failed\n", __func__);
} }
} }
@ -1644,7 +1644,7 @@ static void stm32mp1_hse_enable(bool bypass, bool digbyp, bool css)
stm32mp1_hs_ocs_set(true, RCC_OCENR_HSEON); stm32mp1_hs_ocs_set(true, RCC_OCENR_HSEON);
if (stm32mp1_osc_wait(true, RCC_OCRDYR, RCC_OCRDYR_HSERDY) != 0) { if (stm32mp1_osc_wait(true, RCC_OCRDYR, RCC_OCRDYR_HSERDY) != 0) {
VERBOSE("%s: failed\n", __func__); EARLY_ERROR("%s: failed\n", __func__);
} }
if (css) { if (css) {
@ -1663,7 +1663,7 @@ static void stm32mp1_csi_set(bool enable)
{ {
stm32mp1_hs_ocs_set(enable, RCC_OCENR_CSION); stm32mp1_hs_ocs_set(enable, RCC_OCENR_CSION);
if (stm32mp1_osc_wait(enable, RCC_OCRDYR, RCC_OCRDYR_CSIRDY) != 0) { if (stm32mp1_osc_wait(enable, RCC_OCRDYR, RCC_OCRDYR_CSIRDY) != 0) {
VERBOSE("%s: failed\n", __func__); EARLY_ERROR("%s: failed\n", __func__);
} }
} }
@ -1671,7 +1671,7 @@ static void stm32mp1_hsi_set(bool enable)
{ {
stm32mp1_hs_ocs_set(enable, RCC_OCENR_HSION); stm32mp1_hs_ocs_set(enable, RCC_OCENR_HSION);
if (stm32mp1_osc_wait(enable, RCC_OCRDYR, RCC_OCRDYR_HSIRDY) != 0) { if (stm32mp1_osc_wait(enable, RCC_OCRDYR, RCC_OCRDYR_HSIRDY) != 0) {
VERBOSE("%s: failed\n", __func__); EARLY_ERROR("%s: failed\n", __func__);
} }
} }
@ -1711,7 +1711,7 @@ static int stm32mp1_hsidiv(unsigned long hsifreq)
} }
if (hsidiv == 4U) { if (hsidiv == 4U) {
ERROR("Invalid clk-hsi frequency\n"); EARLY_ERROR("Invalid clk-hsi frequency\n");
return -1; return -1;
} }
@ -1813,8 +1813,8 @@ static int stm32mp1_pll_output(enum stm32mp1_pll_id pll_id, uint32_t output)
/* Wait PLL lock */ /* Wait PLL lock */
while ((mmio_read_32(pllxcr) & RCC_PLLNCR_PLLRDY) == 0U) { while ((mmio_read_32(pllxcr) & RCC_PLLNCR_PLLRDY) == 0U) {
if (timeout_elapsed(timeout)) { if (timeout_elapsed(timeout)) {
ERROR("PLL%u start failed @ 0x%lx: 0x%x\n", EARLY_ERROR("PLL%u start failed @ 0x%lx: 0x%x\n",
pll_id, pllxcr, mmio_read_32(pllxcr)); pll_id, pllxcr, mmio_read_32(pllxcr));
return -ETIMEDOUT; return -ETIMEDOUT;
} }
} }
@ -1842,8 +1842,8 @@ static int stm32mp1_pll_stop(enum stm32mp1_pll_id pll_id)
/* Wait PLL stopped */ /* Wait PLL stopped */
while ((mmio_read_32(pllxcr) & RCC_PLLNCR_PLLRDY) != 0U) { while ((mmio_read_32(pllxcr) & RCC_PLLNCR_PLLRDY) != 0U) {
if (timeout_elapsed(timeout)) { if (timeout_elapsed(timeout)) {
ERROR("PLL%u stop failed @ 0x%lx: 0x%x\n", EARLY_ERROR("PLL%u stop failed @ 0x%lx: 0x%x\n",
pll_id, pllxcr, mmio_read_32(pllxcr)); pll_id, pllxcr, mmio_read_32(pllxcr));
return -ETIMEDOUT; return -ETIMEDOUT;
} }
} }
@ -2381,8 +2381,8 @@ int stm32mp1_clk_init(void)
usbreg_mask; usbreg_mask;
usbreg_bootrom &= usbreg_mask; usbreg_bootrom &= usbreg_mask;
if (usbreg_bootrom != usbreg_value) { if (usbreg_bootrom != usbreg_value) {
VERBOSE("forbidden new USB clk path\n"); EARLY_ERROR("forbidden new USB clk path\n");
VERBOSE("vs bootrom on USB boot\n"); EARLY_ERROR("vs bootrom on USB boot\n");
return -FDT_ERR_BADVALUE; return -FDT_ERR_BADVALUE;
} }
} }