From bebcf27f1c75f48cc129e8608cba113d0db32ef8 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 20 Apr 2022 18:14:32 +0100 Subject: [PATCH] feat(sve): support full SVE vector length Currently the SVE code hard codes a maximum vector length of 512 bits when configuring SVE rather than the architecture supported maximum. While this is fine for current physical implementations the architecture allows for vector lengths up to 2048 bits and emulated implementations generally allow any length up to this maximum. Since there may be system specific reasons to limit the maximum vector length make the limit configurable, defaulting to the architecture maximum. The default should be suitable for most implementations since the hardware will limit the actual vector length selected to what is physically supported in the system. Signed-off-by: Mark Brown Change-Id: I22c32c98a81c0cf9562411189d8a610a5b61ca12 --- Makefile | 3 +++ docs/getting_started/build-options.rst | 8 ++++++++ lib/extensions/sve/sve.c | 11 ++++++++--- make_helpers/defaults.mk | 3 +++ 4 files changed, 22 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index ee5e2e7a8..5916963b5 100644 --- a/Makefile +++ b/Makefile @@ -399,6 +399,8 @@ TF_CFLAGS += $(CPPFLAGS) $(TF_CFLAGS_$(ARCH)) \ -ffreestanding -fno-builtin -fno-common \ -Os -std=gnu99 +$(eval $(call add_define,SVE_VECTOR_LEN)) + ifeq (${SANITIZE_UB},on) TF_CFLAGS += -fsanitize=undefined -fno-sanitize-recover endif @@ -1085,6 +1087,7 @@ $(eval $(call assert_numerics,\ RAS_EXTENSION \ TWED_DELAY \ ENABLE_FEAT_TWED \ + SVE_VECTOR_LEN \ ))) ifdef KEY_SIZE diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst index 26d545805..b4d340700 100644 --- a/docs/getting_started/build-options.rst +++ b/docs/getting_started/build-options.rst @@ -834,6 +834,14 @@ Common build options to mask these events. Platforms that enable FIQ handling in SP_MIN shall implement the api ``sp_min_plat_fiq_handler()``. The default value is 0. +- ``SVE_VECTOR_LEN``: SVE vector length to configure in ZCR_EL3. + Platforms can configure this if they need to lower the hardware + limit, for example due to asymmetric configuration or limitations of + software run at lower ELs. The default is the architectural maximum + of 2048 which should be suitable for most configurations, the + hardware will limit the effective VL to the maximum physically supported + VL. + - ``TRUSTED_BOARD_BOOT``: Boolean flag to include support for the Trusted Board Boot feature. When set to '1', BL1 and BL2 images include support to load and verify the certificates and images in a FIP, and BL1 includes support diff --git a/lib/extensions/sve/sve.c b/lib/extensions/sve/sve.c index aa8904b9b..f7dcc767a 100644 --- a/lib/extensions/sve/sve.c +++ b/lib/extensions/sve/sve.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,9 +8,14 @@ #include #include +#include #include #include +CASSERT(SVE_VECTOR_LEN <= 2048, assert_sve_vl_too_long); +CASSERT(SVE_VECTOR_LEN >= 128, assert_sve_vl_too_short); +CASSERT((SVE_VECTOR_LEN % 128) == 0, assert_sve_vl_granule); + /* * Converts SVE vector size restriction in bytes to LEN according to ZCR_EL3 documentation. * VECTOR_SIZE = (LEN+1) * 128 @@ -39,9 +44,9 @@ void sve_enable(cpu_context_t *context) cptr_el3 = (cptr_el3 | CPTR_EZ_BIT) & ~(TFP_BIT); write_ctx_reg(get_el3state_ctx(context), CTX_CPTR_EL3, cptr_el3); - /* Restrict maximum SVE vector length (SVE_VECTOR_LENGTH+1) * 128. */ + /* Restrict maximum SVE vector length (SVE_VECTOR_LEN+1) * 128. */ write_ctx_reg(get_el3state_ctx(context), CTX_ZCR_EL3, - (ZCR_EL3_LEN_MASK & CONVERT_SVE_LENGTH(512))); + (ZCR_EL3_LEN_MASK & CONVERT_SVE_LENGTH(SVE_VECTOR_LEN))); } void sve_disable(cpu_context_t *context) diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk index fab6bf6da..37f6fa9aa 100644 --- a/make_helpers/defaults.mk +++ b/make_helpers/defaults.mk @@ -373,6 +373,9 @@ ifeq (${ARCH},aarch32) endif ENABLE_SVE_FOR_SWD := 0 +# Default SVE vector length to maximum architected value +SVE_VECTOR_LEN := 2048 + # SME defaults to disabled ENABLE_SME_FOR_NS := 0 ENABLE_SME_FOR_SWD := 0