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fix(cpus): workaround for Cortex-A715 erratum 2413290

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Cortex-A715 erratum 2413290 is a Cat B erratum that is present
only in revision r1p0 and is fixed in r1p1. The errata is only
present when SPE(Statistical Profiling Extension) is enabled.

The workaround is to set bits[58:57] of the CPUACTLR_EL1 to 'b11
when SPE is enabled, ENABLE_SPE_FOR_NS=1.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2148827/latest

Change-Id: Iaeb258c8b0a92e93d70b7dad6ba59d1056aeb135
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
This commit is contained in:
Sona Mathew 2024-02-20 16:59:45 -06:00
parent e8090ce298
commit 15a04615bb
5 changed files with 28 additions and 0 deletions
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5
docs/design/cpu-specific-build-macros.rst
View file

@ -899,6 +899,11 @@ For Cortex-A715, the following errata build flags are defined :
Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is
fixed in r1p1.
- ``ERRATA_A715_2413290``: This applies errata 2413290 workaround to
Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and
when SPE(Statistical profiling extension)=True. The errata is fixed
in r1p1.
- ``ERRATA_A715_2420947``: This applies errata 2420947 workaround to
Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
It is fixed in r1p1.

5
include/lib/cpus/aarch64/cortex_a715.h
View file

@ -12,6 +12,11 @@
/* Cortex-A715 loop count for CVE-2022-23960 mitigation */
#define CORTEX_A715_BHB_LOOP_COUNT U(38)
/*******************************************************************************
* CPU Auxiliary Control register 1 specific definitions.
******************************************************************************/
#define CORTEX_A715_CPUACTLR_EL1 S3_0_C15_C1_0
/*******************************************************************************
* CPU Auxiliary Control register 2 specific definitions.
******************************************************************************/

13
lib/cpus/aarch64/cortex_a715.S
View file

@ -60,6 +60,19 @@ workaround_reset_end cortex_a715, ERRATUM(2344187)
check_erratum_ls cortex_a715, ERRATUM(2344187), CPU_REV(1, 0)
/* Errata applies only when Static profiling extension is enabled. */
workaround_reset_start cortex_a715, ERRATUM(2413290), ERRATA_A715_2413290
/* Apply the workaround by setting CPUACTLR_EL1[58:57] = 0b11. */
mrs x1, id_aa64dfr0_el1
ubfx x0, x1, ID_AA64DFR0_PMS_SHIFT, #4
cbz x0, 1f
sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(57)
sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(58)
1:
workaround_reset_end cortex_a715, ERRATUM(2413290)
check_erratum_range cortex_a715, ERRATUM(2413290), CPU_REV(1,0), CPU_REV(1, 0)
workaround_reset_start cortex_a715, ERRATUM(2420947), ERRATA_A715_2420947
sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(33)
workaround_reset_end cortex_a715, ERRATUM(2420947)

4
lib/cpus/cpu-ops.mk
View file

@ -924,6 +924,10 @@ CPU_FLAG_LIST += ERRATA_A715_2331818
# to revisions r0p0, and r1p0. It is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A715_2344187
# Flag to apply erratum 2413290 workaround during reset. This erratum applies
# only to revision r1p0. It is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A715_2413290
# Flag to apply erratum 2420947 workaround during reset. This erratum applies
# only to revision r1p0. It is fixed in r1p1.
CPU_FLAG_LIST += ERRATA_A715_2420947

1
plat/arm/board/fvp/platform.mk
View file

@ -204,6 +204,7 @@ else
lib/cpus/aarch64/cortex_a78_ae.S \
lib/cpus/aarch64/cortex_a78c.S \
lib/cpus/aarch64/cortex_a710.S \
lib/cpus/aarch64/cortex_a715.S \
lib/cpus/aarch64/neoverse_n_common.S \
lib/cpus/aarch64/neoverse_n1.S \
lib/cpus/aarch64/neoverse_n2.S \