build(amu): restrict counters (RAZ)

The use of AMU counters at the highest implemented exception level
can expose information about them to lower exception levels, such as
specific behavior happening in the CPU (e.g.: MPMM gear shifting in
TC2). In order to prevent this, read accesses to AMU counters are
restricted by default, so they are RAZ (read-as-zero) from lower
exception levels from now on.

Change-Id: I660b0928bea3fe09436ad53b0bb43c3067523178
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
This commit is contained in:
Juan Pablo Conde 2024-04-03 13:18:40 -05:00
parent 332b62e044
commit 14c27f8293
2 changed files with 4 additions and 3 deletions

View file

@ -23,8 +23,9 @@ Common build options
is expected to contain a makefile called ``<aarch32_sp-value>.mk``.
- ``AMU_RESTRICT_COUNTERS``: Register reads to the group 1 counters will return
zero at all but the highest implemented exception level. Reads from the
memory mapped view are unaffected by this control.
zero at all but the highest implemented exception level. External
memory-mapped debug accesses are unaffected by this control.
The default value is 1 for all platforms.
- ``ARCH`` : Choose the target build architecture for TF-A. It can take either
``aarch64`` or ``aarch32`` as values. By default, it is defined to

View file

@ -280,7 +280,7 @@ endif
ENABLE_FEAT_AMU ?= 0
ENABLE_AMU_AUXILIARY_COUNTERS ?= 0
ENABLE_AMU_FCONF ?= 0
AMU_RESTRICT_COUNTERS ?= 0
AMU_RESTRICT_COUNTERS ?= 1
# Build option to enable MPAM for lower ELs.
# Enabling it by default