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feat(scmi): send powerdown request to online secondary cpus

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To initiate a reset or reboot, the nonsecure OS invokes the PSCI
SYSTEM_RESET function from any one core. As per the PSCI specification,
it is the responsibility of firmware to implement the system view of
the reset or reboot operation. For the platforms supported by CSS,
trigger the reset/reboot operation by sending an SGI to rest all CPUs
which are online. The CPUs respond to this interrupt by initiating its
powerdown sequence.

In addition to these changes, fix coding style issues that are not
directly related to the code being introduced in this patch.

Change-Id: I547253ee28ef7eefa78180d016893671a406bbfa
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>
This commit is contained in:
Pranav Madhu 2022-07-22 23:46:11 +05:30
parent f1fe1440db
commit 14a2892309
3 changed files with 25 additions and 0 deletions
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23
drivers/arm/css/scp/css_pm_scmi.c
View file

@ -287,6 +287,17 @@ int css_scp_get_power_state(u_register_t mpidr, unsigned int power_level)
return HW_OFF; return HW_OFF;
} }
/*
* Callback function to raise a SGI designated to trigger the CPU power down
* sequence on all the online secondary cores.
*/
static void css_raise_pwr_down_interrupt(u_register_t mpidr)
{
#if CSS_SYSTEM_GRACEFUL_RESET
plat_ic_raise_el3_sgi(CSS_CPU_PWR_DOWN_REQ_INTR, mpidr);
#endif
}
void __dead2 css_scp_system_off(int state) void __dead2 css_scp_system_off(int state)
{ {
int ret; int ret;
@ -298,11 +309,20 @@ void __dead2 css_scp_system_off(int state)
*/ */
mmio_write_64(PLAT_ARM_TRUSTED_MAILBOX_BASE, 0U); mmio_write_64(PLAT_ARM_TRUSTED_MAILBOX_BASE, 0U);
/*
* Send powerdown request to online secondary core(s)
*/
ret = psci_stop_other_cores(0, css_raise_pwr_down_interrupt);
if (ret != PSCI_E_SUCCESS) {
ERROR("Failed to powerdown secondary core(s)\n");
}
/* /*
* Disable GIC CPU interface to prevent pending interrupt from waking * Disable GIC CPU interface to prevent pending interrupt from waking
* up the AP from WFI. * up the AP from WFI.
*/ */
plat_arm_gic_cpuif_disable(); plat_arm_gic_cpuif_disable();
plat_arm_gic_redistif_off();
/* /*
* Issue SCMI command. First issue a graceful * Issue SCMI command. First issue a graceful
@ -317,6 +337,9 @@ void __dead2 css_scp_system_off(int state)
state, ret); state, ret);
panic(); panic();
} }
/* Powerdown of primary core */
psci_pwrdown_cpu(PLAT_MAX_PWR_LVL);
wfi(); wfi();
ERROR("CSS set power state: operation not handled.\n"); ERROR("CSS set power state: operation not handled.\n");
panic(); panic();

1
plat/arm/css/common/css_common.mk
View file

@ -35,6 +35,7 @@ BL31_SOURCES += drivers/arm/css/mhu/css_mhu_doorbell.c \
drivers/arm/css/scmi/scmi_common.c \ drivers/arm/css/scmi/scmi_common.c \
drivers/arm/css/scmi/scmi_pwr_dmn_proto.c \ drivers/arm/css/scmi/scmi_pwr_dmn_proto.c \
drivers/arm/css/scmi/scmi_sys_pwr_proto.c \ drivers/arm/css/scmi/scmi_sys_pwr_proto.c \
drivers/delay_timer/delay_timer.c \
drivers/arm/css/scp/css_pm_scmi.c drivers/arm/css/scp/css_pm_scmi.c
endif endif

1
plat/arm/css/common/sp_min/css_sp_min.mk
View file

@ -15,6 +15,7 @@ BL32_SOURCES += drivers/arm/css/mhu/css_mhu.c \
else else
BL32_SOURCES += drivers/arm/css/mhu/css_mhu_doorbell.c \ BL32_SOURCES += drivers/arm/css/mhu/css_mhu_doorbell.c \
drivers/arm/css/scp/css_pm_scmi.c \ drivers/arm/css/scp/css_pm_scmi.c \
drivers/delay_timer/delay_timer.c \
drivers/arm/css/scmi/scmi_common.c \ drivers/arm/css/scmi/scmi_common.c \
drivers/arm/css/scmi/scmi_pwr_dmn_proto.c \ drivers/arm/css/scmi/scmi_pwr_dmn_proto.c \
drivers/arm/css/scmi/scmi_sys_pwr_proto.c drivers/arm/css/scmi/scmi_sys_pwr_proto.c